INTEGRATED DOHERTY AMPLIFIER
    3.
    发明公开
    INTEGRATED DOHERTY AMPLIFIER 有权
    INTEGRIERTER DOHERTY-VERSTÄRKER

    公开(公告)号:EP2195921A2

    公开(公告)日:2010-06-16

    申请号:EP08807413.3

    申请日:2008-08-22

    申请人: NXP B.V.

    发明人: BLEDNOV, Igor

    IPC分类号: H03F1/02 H03F1/07

    摘要: The invention relates to an integrated Doherty amplifier with an input network connecting the input to the main stage and to the peak stage, and with an output network connecting the main stage and the peak stage to the output. The output network has a shunt capacitor to signal-ground in parallel to a parasitic capacitance of the main stage, and has a shunt inductor between the main stage and signal ground. The shunt configuration enables to use the MMIC Doherty amplifier in a wide frequency range. At least some of the inductors of the input network and/or output network are implemented using bond wires. Their orientations and locations provide minimal mutual electromagnetic coupling between the wires and the return RF current paths.

    摘要翻译: 本发明涉及一种集成的Doherty放大器,其具有将输入连接到主级和峰值级的输入网络,以及将主级和峰值级连接到输出的输出网络。 输出网络具有并联电容器,并联到主级的寄生电容,并且在主级和信号地之间具有并联电感器。 分流配置可以在宽频率范围内使用MMIC Doherty放大器。 使用接合线实现输入网络和/或输出网络的至少一些电感器。 它们的取向和位置在导线和返回RF电流路径之间提供最小的相互电磁耦合。

    A HIGH POWER INTEGRATED RF AMPLIFIER
    5.
    发明公开
    A HIGH POWER INTEGRATED RF AMPLIFIER 审中-公开
    集成的高射频放大器

    公开(公告)号:EP2013943A2

    公开(公告)日:2009-01-14

    申请号:EP07735617.8

    申请日:2007-04-24

    申请人: NXP B.V.

    发明人: BLEDNOV, Igor

    IPC分类号: H01Q3/26

    摘要: An integrated HF-amplifier has an input bond pad, cells displaced in a first direction, and an output bond pad. Each has a amplifier with input pad, active area, and output pad. The active area is arranged in-between the input and output pads, and the input pad, active area, and output pad are respectively displaced in a second direction substantially perpendicular to the first direction. A first network interconnects input pads of adjacent cells, and extends in the first direction. A second network interconnects output pads of adjacent cells, and extends in the first direction. The first and second networks obtain an output signal at the output bond pad having for all interconnected cells an equal phase shift and amplitude for a same input signal at the input bond pad. At particular bias and phase shift conditions this provides a Doherty amplifier with improved efficiency at power back off.

    POWER AMPLIFIER
    6.
    发明公开
    POWER AMPLIFIER 有权
    功率放大器

    公开(公告)号:EP1985012A1

    公开(公告)日:2008-10-29

    申请号:EP07705802.2

    申请日:2007-02-06

    申请人: NXP B.V.

    IPC分类号: H03F1/02

    摘要: A radio frequency power amplifier has first and second amplifier stages coupled in series, one of which is operated in class F and the other is operated in inverse class F; an envelope detector adapted to detect an envelope of the input signal; a power supply coupled to supply an electrical supply voltage to the first and second amplifier stages, wherein the electrical supply voltage is controlled to follow the envelope of the input signal. Such amplifier makes it possible to maintain class F and inverse class F operation, respectively, of the first and second amplifier stages independent on the input signal. Preferably, this is done by controlling the electrical supply voltage so that the saturation levels of the first and second amplifier stages follow the envelope of the input signal.

    摘要翻译: 射频功率放大器具有串联的第一和第二放大器级,其中一个以F级操作,而另一个以逆F级操作; 包络检测器,适于检测输入信号的包络; 耦合以向第一和第二放大器级提供电源电压的电源,其中电源电压被控制以跟随输入信号的包络。 这样的放大器可以分别保持独立于输入信号的第一和第二放大器级的F级和逆F级操作。 优选地,这通过控制电源电压来完成,使得第一和第二放大器级的饱和电平跟随输入信号的包络。

    INTEGRATED DOHERTY TYPE AMPLIFIER ARRANGEMENT WITH HIGH POWER EFFICIENCY
    7.
    发明公开
    INTEGRATED DOHERTY TYPE AMPLIFIER ARRANGEMENT WITH HIGH POWER EFFICIENCY 审中-公开
    INTEGRIERTE DOHERTY-HOCHLEISTUNGSVERSTÄRKERANORDNUNG

    公开(公告)号:EP1886404A2

    公开(公告)日:2008-02-13

    申请号:EP06744947.0

    申请日:2006-05-16

    申请人: NXP B.V.

    发明人: BLEDNOV, Igor

    IPC分类号: H03F1/02 H03F1/56 H03F3/195

    摘要: The present invention relates to an integrated Doherty type amplifier arrangement and an amplifying method for such an arrangement, wherein a lumped element hybrid power divider (12) is provided for splitting input signals of main and peak amplifier stages (20, 30, 40) at predetermined phase shifts and non-equal division rates and at least one wideband lumped element artificial line (Zl, Z2) combined with wideband compensation circuit for receiving said first amplified signal and for applying said predetermined phase shift to said first amplified signal and its higher harmonics. Thereby, the low gain of the peak amplifier is compensated by providing the non-equal power splitting at the input. Moreover, the use of the lumped element hybrid power divider leads to an improved isolation between the input ports of the main and peak amplifiers decreasing final distortions of the output signal.

    摘要翻译: 本发明涉及一种用于这种布置的集成Doherty型放大器装置和放大方法,其中提供了集总元件混合功率分配器(12),用于将主放大器级和峰值放大器级(20,30,40)的输入信号分开 与宽带补偿电路组合的至少一个宽带集总元件人造线(Z1,Z2),用于接收所述第一放大信号并将所述预定相移施加到所述第一放大信号及其高次谐波 。 因此,通过在输入端提供不相等的功率分配来补偿峰值放大器的低增益。 此外,集总元件混合功率分配器的使用导致主放大器和峰值放大器的输入端口之间的隔离改善,从而减小输出信号的最终失真。

    DOHERTY AMPLIFIER
    10.
    发明授权
    DOHERTY AMPLIFIER 有权
    Doherty放大器

    公开(公告)号:EP2011230B1

    公开(公告)日:2011-09-07

    申请号:EP07735470.2

    申请日:2007-04-11

    申请人: NXP B.V.

    发明人: BLEDNOV, Igor

    IPC分类号: H03F1/07

    摘要: An integrated Doherty amplifier structure comprises an input bond pad (IBP), and an output bond pad (OBP). A first transistor (T1) forms the peak amplifier stage of the Doherty amplifier and has a control input (G1) to receive a first input signal (ISl) being an input signal of the Doherty amplifier, and has an output (Dl) to supply an amplified first input signal (OS1) at an output of the Doherty amplifier. A second transistor (T2) forms a main amplifier stage of the Doherty amplifier and has a control input (G2) to receive a second input signal (IS2) and has an output (D2) to supply an amplified second input signal (0S2). The first input signal (ISl) and the second input signal (IS2) have a 90° phase offset. A first bond wire (BW1) forms a first inductance (L1), and extends in a first direction, and is arranged between the input bond pad (IBP) and the control input (G1) of the first transistor (T1). A second bond wire (B W2) forms a second inductance (L2), and extends in the first direction, and is arranged between the output bond pad (OBP) and the output (D1) of the first transistor (T1). A third bond wire (B W3) forms a third inductance (L3) and extends in a second direction substantially perpendicular to the first direction, and is arranged between the output (D1) of the first transistor (T1) and the output (D2) of the second transistor (T2).