公开(公告)号：EP3051587B1

公开(公告)日：2018-12-12

申请号：EP16159240.7

申请日：2001-09-14

Applicant: Qualcomm Incorporated

Inventor： WEBER, David ,  YUE, Patrick ,  SU, David

IPC: H01L27/088 ,  H01L23/66 ,  H01L23/00 ,  H03F1/22 ,  H03F3/45 ,  H04B1/04 ,  H03F3/24

CPC classification number: H01L24/06 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L27/088 ,  H01L2223/6644 ,  H01L2224/05554 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01031 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H03F1/223 ,  H03F3/24 ,  H03F3/45188 ,  H03F2200/06 ,  H03F2203/45638 ,  H03F2203/45652 ,  H04B2001/0408 ,  Y10S977/724 ,  H01L2924/00 ,  H01L2224/45099

Abstract: The present invention provides a breakdown resistant transistor structure for amplifying communication signals. This structure includes a first NMOS transistor having a source connected to ground and a first gate for receiving the input radio frequency signal. The first gate is disposed above a first insulator and the first NMOS transistor having a first transconductance and a first breakdown voltage associated therewith. Also included is a second NMOS transistor having a source connected to the drain of the first NMOS transistor, a gate connected to the reference DC voltage, and a drain that provides the output for the amplified radio signal, the load being disposed between the reference DC voltage and the drain of the second NMOS transistor. The second gate is disposed above a second insulator, the second NMOS transistor has a second transconductance and a second breakdown voltage associated therewith, and the second insulator may be thicker than the first insulator. This results in the first transconductance being greater than the second transconductance, and the second breakdown voltage being greater than the first breakdown voltage.

公开(公告)号：EP3410470A1

公开(公告)日：2018-12-05

申请号：EP18182981.3

申请日：2006-03-20

Applicant: Micron Technology, Inc.

Inventor： HEMBREE, David R.

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  B23K20/00 ,  H05K3/40

CPC classification number: H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a semiconductor component (86) with a through wire interconnect (102) includes the step of providing a substrate (54) having a circuit side (62), a back side (64), and a through via (76). The method also includes the steps of: threading a wire (14) through the via (76), forming a contact (90) on the wire (14) on the back side (64), forming a bonded contact (92) on the wire (14) on the circuit side (62), and then severing the wire (14) from the bonded contact (92). The through wire interconnect includes (102) the wire (14) in the via (76), the contact (90) on the back side (64) and the bonded contact (92) on the circuit side (62). The contact (90) on the back side (64), and the bonded contact (92) on the circuit side (62), permit multiple components (86-1, 86-2, 86-3) to be stacked with electrical connections (170) between adjacent components. A system (120) for performing the method includes the substrate (54) with the via (76), and a wire bonder (10) having a bonding capillary (12) configured to thread the wire (14) through the via (76), and form the contact (90) and the bonded contact (92). The semiconductor component (86) can be used to form chip scale components, wafer scale components, stacked components (146), or interconnect components (861) for electrically engaging or testing other semiconductor components (156).

公开(公告)号：EP1724848B1

公开(公告)日：2018-08-15

申请号：EP06290785.2

申请日：2006-05-15

Applicant: LG Electronics, Inc. ,  LG Innotek Co., Ltd.

Inventor： Kim, Geun Ho ,  Lee, Seung Yeob, 402, Jeongseok Green Villa

IPC: H01L33/62 ,  H01L33/54

CPC classification number: H01L33/62 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L33/44 ,  H01L33/507 ,  H01L33/508 ,  H01L33/54 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/8592 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099

Abstract: The present invention relates to a light emitting device package and a method for manufacturing the same. The present invention has advantages in that a light emitting device is electrically connected to other devices without use of wire bonding, thereby saving a space for wire bonding and reducing the size of a package. The present invention has advantages in that there is no wire in a light emitting device by using a conductive interconnection portion so that a phosphor can be easily and uniformly applied, and an area where vertically emitted light is absorbed can be reduced so that light extraction of a device can be enhanced.

公开(公告)号：EP3029167A4

公开(公告)日：2017-08-09

申请号：EP15819755

申请日：2015-05-20

Applicant: NIPPON STEEL & SUMIKIN MAT CO ,  NIPPON MICROMETAL CORP

Inventor： OYAMADA TETSUYA ,  UNO TOMOHIRO ,  DEAI HIROYUKI ,  ODA DAIZO

IPC: H01L23/49 ,  C22C5/06 ,  C22F1/00 ,  C22F1/14

CPC classification number: H01L24/45 ,  C22C5/10 ,  H01L24/05 ,  H01L24/43 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05624 ,  H01L2224/4321 ,  H01L2224/43848 ,  H01L2224/43986 ,  H01L2224/45015 ,  H01L2224/45101 ,  H01L2224/45105 ,  H01L2224/45109 ,  H01L2224/45117 ,  H01L2224/45138 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45163 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45173 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48479 ,  H01L2224/48507 ,  H01L2224/85065 ,  H01L2224/85075 ,  H01L2224/85439 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/01001 ,  H01L2924/01007 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/01048 ,  H01L2924/01028 ,  H01L2924/01005 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01004 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01203 ,  H01L2924/01044 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2224/48471 ,  H01L2924/00015 ,  H01L2924/01008 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2924/01033 ,  H01L2224/4554

Abstract: The present invention provides a bonding wire which can satisfy bonding reliability, spring performance, and chip damage performance required in high-density packaging. A bonding wire contains one or more of In, Ga, and Cd for a total of 0.05 to 5 at%, and a balance being made up of Ag and incidental impurities.

Abstract translation: 本发明提供一种能够满足高密度封装所需的接合可靠性，弹簧性能和芯片损伤性能的接合线。 接合线包含总计0.05-5原子％的In，Ga和Cd中的一种或多种，​​余量由Ag和不可避免的杂质组成。

公开(公告)号：EP3086362A4

公开(公告)日：2017-05-31

申请号：EP15866377

申请日：2015-06-05

Applicant: NIPPON MICROMETAL CORP ,  NIPPON STEEL & SUMIKIN MAT CO

Inventor： ODA DAIZO ,  ETO MOTOKI ,  YAMADA TAKASHI ,  HAIBARA TERUO ,  OISHI RYO ,  UNO TOMOHIRO ,  OYAMADA TETSUYA

IPC: H01L23/49 ,  C22C9/00 ,  C22F1/08 ,  H01L21/60

CPC classification number: H01L24/45 ,  C22C9/00 ,  C22F1/08 ,  H01L24/05 ,  H01L24/43 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05624 ,  H01L2224/4312 ,  H01L2224/43125 ,  H01L2224/4321 ,  H01L2224/43848 ,  H01L2224/45 ,  H01L2224/45005 ,  H01L2224/45015 ,  H01L2224/45109 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45609 ,  H01L2224/45644 ,  H01L2224/45664 ,  H01L2224/48011 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48824 ,  H01L2224/85045 ,  H01L2224/85054 ,  H01L2224/85065 ,  H01L2224/85075 ,  H01L2224/8509 ,  H01L2224/85203 ,  H01L2224/85439 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/20111 ,  H01L2924/20752 ,  H01L2924/01204 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/01001 ,  H01L2924/01007 ,  H01L2924/20105 ,  H01L2924/20656 ,  H01L2924/00 ,  H01L2924/2011 ,  H01L2924/01004 ,  H01L2924/01033

Abstract: There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a high-temperature and high-humidity environment and is suitable for on-vehicle devices. The bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, and the bonding wire contains In of 0.011 to 1.2% by mass and has the Pd coating layer of a thickness of 0.015 to 0.150 µm. With this configuration, it is able to increase the bonding longevity of a ball bonded part in a high-temperature and high-humidity environment, and thus to improve the bonding reliability. When the Cu alloy core material contains one or more elements of Pt, Pd, Rh and Ni in an amount, for each element, of 0.05 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 175°C or more. When an Au skin layer is further formed on a surface of the Pd coating layer, wedge bondability improves.

Abstract translation: 提供一种在其表面上具有Pd涂层的Cu接合线，其提高了球接合部在高温高湿环境下的接合可靠性，并且适用于车载装置。 本发明的半导体装置用接合线具备Cu合金芯材和在该Cu合金芯材的表面形成的Pd被覆层，该接合线含有0.011〜1.2质量％的In，并且具有 厚度为0.015至0.150μm。 利用该构造，能够增加球接合部在高温高湿环境下的接合寿命，并由此改善接合可靠性。 Cu合金芯材含有0.05〜1.2质量％的Pt，Pd，Rh和Ni中的一种或两种以上的元素时，能够提高球接合部的可靠性， 175°C或更高的温度环境。 当在Pd涂层的表面上进一步形成Au表层时，楔接合性提高。

公开(公告)号：EP2002478B1

公开(公告)日：2016-09-07

申请号：EP07735213.6

申请日：2007-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： WYLAND, Chris

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L21/60 ,  H01L23/485 ,  H01L23/488 ,  H01L23/49

CPC classification number: H01L24/49 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2223/6611 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49175 ,  H01L2224/73277 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Consistent with an example embodiment, there is an integrated circuit (IC) device in a packaging having electrically insulated connections. The IC device comprises a semiconductor device (100) mounted onto a die attachment area (10); the semiconductor device has a plurality of bonding pads (20a, 25a, 30a, 35a). A lead frame having a plurality of bonding fingers (20b, 25b, 30b, 35b) surrounds the die attachment area. A plurality of mutually isolated connection conductors (25d, 30d, 40, 50) having respective first ends are attached to respective bonding pads on the semiconductor device and the plurality of mutually isolated connection conductors having respective second respective second ends are attached to respective bonding fingers of the lead frame. An insulating material (45) coats at least a portion of the plurality of mutually isolated connection conductors. The mutually isolated connection conductors may include a bond wire (40, 50) for the signal connection and a conductive strap (25d, 30d) for the voltage reference connection. The insulating material (45) coating the bond wires reduces the likelihood of short circuits during encapsulation.

公开(公告)号：EP2858101A3

公开(公告)日：2016-01-27

申请号：EP14178910.7

申请日：2014-07-29

Applicant: Kabushiki Kaisha Toshiba

Inventor： Hiratsuka, Daisuke ,  Iguchi, Tomohiro ,  Uchida, Masayuki

IPC: H01L21/60 ,  H01L23/488 ,  H01L21/48 ,  H01L23/498 ,  B23K35/02 ,  H01B1/16 ,  H01B1/22 ,  B22F1/00 ,  B23K35/26 ,  B23K35/28 ,  B23K35/30 ,  B23K35/32 ,  B23K35/36 ,  C22C1/04

CPC classification number: B23K35/025 ,  B22F1/0003 ,  B22F1/0018 ,  B22F1/0074 ,  B22F2999/00 ,  B23K35/24 ,  B23K35/262 ,  B23K35/264 ,  B23K35/282 ,  B23K35/286 ,  B23K35/30 ,  B23K35/3006 ,  B23K35/3013 ,  B23K35/302 ,  B23K35/3033 ,  B23K35/32 ,  B23K35/322 ,  B23K35/325 ,  B23K35/3601 ,  B23K35/362 ,  C22C1/0491 ,  C22C5/06 ,  H01L21/4867 ,  H01L23/3737 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/0381 ,  H01L2224/04026 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/2732 ,  H01L2224/2741 ,  H01L2224/2744 ,  H01L2224/29006 ,  H01L2224/29294 ,  H01L2224/29313 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/2936 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/29371 ,  H01L2224/29372 ,  H01L2224/29373 ,  H01L2224/29376 ,  H01L2224/29378 ,  H01L2224/2938 ,  H01L2224/2949 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83075 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/8322 ,  H01L2224/83411 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/8384 ,  H01L2924/01102 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1067 ,  H01L2924/12044 ,  H01L2924/15787 ,  H01L2924/0543 ,  H01L2924/01031 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  B22F1/0022

Abstract: A metallic particle paste (10) includes a polar solvent (4) and particles (10) dispersed in the polar solvent and containing a first metal. A second metal different from the first metal is dissolved in the polar solvent. The second metal is present in solvent (10) of the metallic particle paste (10) in the form of a complex ion, an organometallic ion or an ion of a metal salt. The paste (10) may be used for forming wiring and a heat-radiation portion of an electronic substrate or for bonding members (5, 7) in a semiconductor device through a bonding layer (6).

公开(公告)号：EP2210265B1

公开(公告)日：2014-09-24

申请号：EP08842013.8

申请日：2008-07-25

Applicant: Estivation Properties LLC

Inventor： DAVIES, Robert, Bruce

IPC: H01L21/00 ,  H01L21/762 ,  H01L21/764 ,  H01L23/66

CPC classification number: H01L21/76232 ,  H01L21/76229 ,  H01L21/764 ,  H01L23/66 ,  H01L24/37 ,  H01L24/39 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6644 ,  H01L2224/371 ,  H01L2224/37599 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

公开(公告)号：EP2400543A3

公开(公告)日：2013-08-28

申请号：EP11007462.2

申请日：2004-08-19

Applicant: The Kansai Electric Power Co., Inc.

Inventor： Sugawara, Yoshikata

IPC: H01L23/34 ,  H01L29/861 ,  H01L29/74

CPC classification number: H01L29/8613 ,  H01L23/045 ,  H01L23/34 ,  H01L23/345 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/744 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4823 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10157 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15312 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20758 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012

Abstract: This invention relates to a semiconductor production method comprising: a step of stacking at least two wide-gap semiconductor layers having different conductive types each other so as to form a wide-gap bipolar semiconductor element having a built-in voltage in the forward direction; and a step of irradiating a gamma ray, an electron beam or a charged particle beam having predetermined irradiation energy to the wide-gap semiconductor layers having stacking faults up to a predetermined amount of irradiation.

公开(公告)号：EP1968109A3

公开(公告)日：2012-08-01

申请号：EP08004084.3

申请日：2008-03-05

Applicant: Nissan Motor Co., Ltd.

Inventor： Murakami, Yoshinori

IPC: H01L21/60 ,  H01L23/00 ,  H01L23/14 ,  H01L29/06 ,  H01L29/32

CPC classification number: H01L23/142 ,  H01L23/562 ,  H01L24/31 ,  H01L24/83 ,  H01L29/0657 ,  H01L29/32 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/01014 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A semiconductor device (100) includes: a semiconductor chip (2) including: a first main face (2I) having an edge portion, a second main face (2II) locating the opposite side to the first main face (2I), a crystalline defect region (4, 5) present within a region including at least the edge portion being adjacent to the first main face (2I), the crystalline defect region (4, 5) being configured to have lower stress than the stress in the other semiconductor region (6) for the same strain; and a metallic substrate (1) to be bonded via a bonding member (3) to the fust main face (2I) of the semiconductor chip (2).