LOW COST INTERPOSER COMPRISING AN OXIDATION LAYER
    1.
    发明公开
    LOW COST INTERPOSER COMPRISING AN OXIDATION LAYER 审中-公开
    与氧化层的低成本ZWISCHENSTÜCK

    公开(公告)号:EP2984679A1

    公开(公告)日:2016-02-17

    申请号:EP14722935.5

    申请日:2014-04-08

    IPC分类号: H01L23/498 H01L21/48

    摘要: Some implementations provide an interposer that includes a substrate, a via in the substrate, and an oxidation layer. The via includes a metal material. The oxidation layer is between the via and the substrate. In some implementations, the substrate is a silicon substrate. In some implementations, the oxidation layer is a thermal oxide formed by exposing the substrate to heat. In some implementations, the oxidation layer is configured to provide electrical insulation between the via and the substrate. In some implementations, the interposer also includes an insulation layer. In some implementations, the insulation layer is a polymer layer. In some implementations, the interposer also includes at least one interconnect on the surface of the interposer. The at least one interconnect is positioned on the surface of the interposer such that the oxidation layer is between the interconnect and the substrate.

    THREE DIMENSIONAL INDUCTOR AND TRANSFORMER
    4.
    发明公开
    THREE DIMENSIONAL INDUCTOR AND TRANSFORMER 审中-公开
    维和变压器INDUKTOR

    公开(公告)号:EP2486586A1

    公开(公告)日:2012-08-15

    申请号:EP10771245.7

    申请日:2010-10-07

    摘要: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

    CORROSION CONTROL OF STACKED INTEGRATED CIRCUITS
    8.
    发明公开
    CORROSION CONTROL OF STACKED INTEGRATED CIRCUITS 审中-公开
    KORROSIONSKONTROLLE GESTAPELTER INTEGRIERTER SCHALTUNGEN

    公开(公告)号:EP2327092A1

    公开(公告)日:2011-06-01

    申请号:EP09791539.1

    申请日:2009-08-14

    摘要: A system and method prevent corrosive elements (or at least the oxidizing agent) from making contact with metal connections at the interface between two layers of a stacked IC device. When layers are positioned in proximity to each other, a cavity is formed at the boundary of the planar surfaces of the layers. This cavity is bounded by a peripheral seal between the layers. In one embodiment, a vacuum is created within the cavity thereby reducing the corrosive atmosphere within the cavity. In another embodiment, the cavity is filled with an inert gas, such as argon. Once the cavity has oxidizing elements reduced, the peripheral seal can be encapsulated to prevent seepage of contaminants into the cavity.

    摘要翻译: 一种系统和方法可以防止腐蚀性元素(或至少氧化剂)在层叠IC器件的两层之间的界面处与金属连接接触。 当层彼此靠近地定位时,在层的平面表面的边界处形成空腔。 该空腔由两层之间的周边密封界定。 在一个实施例中,在空腔内产生真空,从而减小空腔内的腐蚀性气氛。 在另一个实施例中,空腔填充有惰性气体,例如氩气。 一旦腔体的氧化元件减少,外围密封件就可以被密封,以防止污染物渗入空腔。