公开(公告)号：EP1913462A2

公开(公告)日：2008-04-23

申请号：EP06792740.0

申请日：2006-08-08

申请人： STMicroelectronics S.r.l.

发明人： FONTANELLA, Luca ,  PASOLINI, Fabio ,  VIGNA, Benedetto ,  CHIESA, Enrico

IPC分类号： G06F3/043

CPC分类号： G06F3/0433

摘要： In a device (2) for determining the position (P1(x, y) ) of a touch on a contact surface (1a), a plurality of vibration sensors (4) are configured to detect mechanical vibrations (9) generated by the touch on the contact surface (1a) and to generate corresponding vibration signals, and a processing circuit (6) is connected to the vibration sensors (4) and is configured to determine the touch position (P1 (x, y) ) via a time-of-f light algorithm, based on differences between times of detection (t1, t2, t3) of the mechanical vibrations (9) by the vibration sensors (4).

公开(公告)号：EP1945561A2

公开(公告)日：2008-07-23

申请号：EP06777802.7

申请日：2006-07-14

申请人： STMicroelectronics S.r.l.

发明人： COMBI, Chantal ,  VIGNA, Benedetto ,  ZIGLIOLI, Federico Giovanni ,  BALDO, Lorenzo ,  MAGUGLIANI, Manuela ,  LASALANDRA, Ernesto ,  RIVA, Caterina

IPC分类号： B81B7/02

CPC分类号： B81B7/0061 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C1/0023 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H04R1/04 ,  H04R19/005 ,  H01L2924/00014 ,  H01L2924/00

摘要： A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidly isolated from the first empty space, is provided over the respective membrane of the further integrated device.

摘要翻译： 具有A衬底级组件的半导体材料的器件衬底具有顶面和外壳的第一集成器件，包括器件衬底内形成的掩埋空腔，并用悬浮在在顶面的接近掩埋空腔的膜。 甲封盖衬底耦合到所述顶面之上的器件衬底，以便覆盖所述第一集成器件在寻求做的膜上方提供第一空白空间的方式。 电接触元件电连接与所述衬底级组件的外部集成器件。 在一个实施例中，器件衬底至少集成设置有respectivement膜的进一步集成器件，和另外的空的空间，从所述第一空的空间流体地隔离，则在进一步的集成器件的respectivement膜提供。

公开(公告)号：EP4005972A1

公开(公告)日：2022-06-01

申请号：EP21211139.7

申请日：2021-11-29

申请人： STMicroelectronics S.r.l. ,  STMicroelectronics International N.V.

发明人： DUQI, Enri ,  BALDO, Lorenzo ,  FERRARI, Paolo ,  VIGNA, Benedetto ,  VILLA, Flavio Francesco ,  CASTOLDI, Laura Maria ,  GELMI, Ilaria

IPC分类号： B81C1/00 ,  H04R1/08

摘要： A semiconductor device includes: a substrate (2); a transduction microstructure (3) integrated in the substrate (2); a cap (5) joined to the substrate (2) and having a first face (5a) adjacent to the substrate (2) and a second, outer, face (5b); and a channel (15) extending through the cap (5) from the second face (5b) to the first face (5a) and communicating with the transduction microstructure (3). A protective membrane (17) made of porous polycrystalline silicon permeable to aeriform substances is set across the channel (15).