-
公开(公告)号:EP3761374A1
公开(公告)日:2021-01-06
申请号:EP19761259.1
申请日:2019-02-25
发明人: SASAKI, Kohei , FUJITA, Minoru , HIRABAYASHI, Jun , ARIMA, Jun
IPC分类号: H01L29/872 , C30B29/16 , C30B33/08 , H01L21/329 , H01L29/41 , H01L29/47 , H01L29/861 , H01L29/868 , H01L29/94
摘要: Provided is a trench MOS Schottky diode 1 which is provided with: a first semiconductor layer 10 that is formed from a Ga 3 O 3 single crystal; a second semiconductor layer 11 that is formed from a Ga 3 O 3 single crystal and has a trench 12; an anode electrode 13; a cathode electrode 14; an insulating film 15; and a trench electrode 16. This trench MOS Schottky diode 1 is configured such that the second semiconductor layer 11 has an insulating dry etching damaged layer 11a, which has a thickness of 0.8 µm or less, in a region that includes the inner surface of the trench 12.
-
公开(公告)号:EP3588580A1
公开(公告)日:2020-01-01
申请号:EP18757087.4
申请日:2018-02-27
IPC分类号: H01L29/872 , H01L29/06 , H01L29/20 , H01L29/47
摘要: One embodiment of the present invention provides a trench MOS Schottky diode 1 which is provided with: a first semiconductor layer 10 which is formed from a Ga 2 O 3 single crystal; a second semiconductor layer 11 which is laminated on the first semiconductor layer 10 and has a trench 12 that opens to a surface 17, while being formed from a Ga 2 O 3 single crystal; an anode electrode 13 which is formed on the surface 17; a cathode electrode 14 which is formed on a surface of the first semiconductor layer 10, said surface being on the reverse side of the second semiconductor layer 11-side surface; an insulating film 15 which covers the inner surface of the trench 12 of the second semiconductor layer 11; and a trench MOS gate 16 which is buried within the trench 12 of the second semiconductor layer 11 so as to be covered by the insulating film 15, while being in contact with the anode electrode 13. The second semiconductor layer 11 is configured from: a lower layer 11b which is on the first semiconductor layer side; and an upper layer 11a which is on the anode electrode 13 side, while having a higher donor concentration than the lower layer 11b.
-
公开(公告)号:EP4404276A1
公开(公告)日:2024-07-24
申请号:EP22869716.5
申请日:2022-08-03
发明人: TAKATSUKA, Akio , SASAKI, Kohei
IPC分类号: H01L29/868 , H01L29/201 , H01L29/861
CPC分类号: H01L29/868 , H01L29/201 , H01L29/861
摘要: Provided is a p-n junction diode which can achieve both of the achievement of a low turn-on voltage and the reduction in a leak current even when the p-n junction diode has a simple structure. In one embodiment, a p-n junction diode 1 is provided, which is provided with an n-type semiconductor layer 11 that is composed of a single crystal of an n-type semiconductor having a chemical composition represented by the formula: (GaxAlyIn1-x-y)2O3 (0
-
4.
公开(公告)号:EP4383315A1
公开(公告)日:2024-06-12
申请号:EP22853114.1
申请日:2022-08-03
发明人: SASAKI, Kohei , LIN, Chia-Hung
摘要: Provided is a gallium oxide-based semiconductor substrate configured to allow the formation, by HVPE, of a gallium oxide-based epitaxial film having a small film thickness distribution, a small donor concentration distribution, and a low crystal defect density. Also provided are a semiconductor wafer including the semiconductor substrate and the epitaxial film, and a method for manufacturing the semiconductor wafer. As one embodiment, provided is a semiconductor substrate 10 in which at least one main surface thereof is a crystal growth base surface 11. The semiconductor substrate 10 comprises a single crystal of a gallium oxide-based semiconductor. The growth base surface 11 is the (001) plane. In a continuous region of 70 area% or more of the growth base surface 11, the off angle in the [010] direction is in the range from greater than -0.3° to -0.01°, or in the range from 0.01° to smaller than 0.3°. In said region of the growth base surface 11, the off angle in the [001] direction is in the range from -1° to 1°. The diameter of the semiconductor substrate 10 is 2 inches or more.
-
公开(公告)号:EP4084064A1
公开(公告)日:2022-11-02
申请号:EP20905852.8
申请日:2020-12-21
发明人: MACHIDA, Nobuo , SASAKI, Kohei
IPC分类号: H01L23/50 , H01L21/60 , H01L29/872
摘要: Provided is a semiconductor device that has, mounted on a lead frame, a vertical semiconductor element which uses a Ga 2 O 3 -based semiconductor as the material of a substrate and epitaxial layer, the semiconductor device being capable of effectively releasing heat from the semiconductor device to the lead frame. As one embodiment, a semiconductor device 1 is provided which comprises: a lead frame 20 that has a projection 200 on the surface; and an SBD 10 that is mounted face down on the lead frame 20 and includes a substrate 11 which is made of a Ga 2 O 3 -based semiconductor, an epitaxial layer 12 which is stacked on the substrate 11 and made of the Ga 2 O 3 -based semiconductor, a cathode electrode 13 which is connected to the substrate 11, and an anode electrode 14 which is connected to the epitaxial layer 12 and has a field plate part 140 on an outer peripheral part. The SBD 10 is fixed on the projection 200, and an outer peripheral part 120 of the epitaxial layer 12 is located right above a flat part 201 of the lead frame 20.
-
公开(公告)号:EP3690924A1
公开(公告)日:2020-08-05
申请号:EP18861655.1
申请日:2018-09-26
发明人: SASAKI, Kohei
IPC分类号: H01L21/337 , H01L21/28 , H01L21/338 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/12 , H01L29/24 , H01L29/41 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/808 , H01L29/812 , H01L29/861 , H01L29/868
摘要: Provided is a Ga 2 O 3 -based field effect transistor which does not use a p-type β-Ga 2 O 3 single crystal and which has excellent off-leak characteristics and an excellent breakdown voltage. One embodiment of the present invention provides a trench-type MOSFET 1 comprising: an n-type semiconductor layer 11 composed of a Ga 2 O 3 -based single crystal and having a plurality of trenches opened on one surface thereof; gate electrodes 12 respectively embedded in the plurality of trenches 16; a source electrode 14 connected to mesa-shaped regions between adjacent trenches of the n-type semiconductor layer 11; and a drain electrode 15 connected to the reverse side of the n-type semiconductor layer 11 from the source electrode 14 with an n-type semiconductor substrate 10 therebetween.
-
公开(公告)号:EP3629379A1
公开(公告)日:2020-04-01
申请号:EP18790539.3
申请日:2018-04-26
申请人: National Institute of Information and Communications Technology , Tamura Corporation , Novel Crystal Technology, Inc.
发明人: HIGASHIWAKI, Masataka , NAKATA, Yoshiaki , KAMIMURA, Takafumi , WONG, Man Hoi , SASAKI, Kohei , WAKIMOTO, Daiki
IPC分类号: H01L29/24 , C30B23/08 , C30B29/16 , H01L21/336 , H01L21/338 , H01L29/12 , H01L29/423 , H01L29/47 , H01L29/49 , H01L29/78 , H01L29/812 , H01L29/872
摘要: As an embodiment, provided is a Ga 2 O 3 -based semiconductor device 1a that has: a second Ga 2 O 3 -based crystal layer 11 containing a donor; and an N-doped region formed in the entire second Ga 2 O 3 -based crystal layer 11.
-
公开(公告)号:EP3651210A1
公开(公告)日:2020-05-13
申请号:EP18828534.0
申请日:2018-06-12
IPC分类号: H01L29/872 , H01L21/329 , H01L29/06 , H01L29/24 , H01L29/47
摘要: Provided is a Schottky barrier diode which is configured from a Ga 2 O 3 semiconductor, and which has a lower turn-on voltage than conventional Schottky barrier diodes. One embodiment of the present invention provides a Schottky barrier diode 1 which is provided with: a semiconductor layer 10 that is formed of a Ga 2 O 3 single crystal; an anode electrode 11 that forms a Schottky junction with the semiconductor layer 10 and has a portion which is in contact with the semiconductor layer 10, while being formed from Mo or W; and a cathode electrode 12. This Schottky barrier diode 1 has a turn-on voltage of from 0.3 V to 0.5 V (inclusive).
-
公开(公告)号:EP3591711A1
公开(公告)日:2020-01-08
申请号:EP18761989.5
申请日:2018-02-19
IPC分类号: H01L29/872 , H01L21/329 , H01L29/06 , H01L29/47
摘要: Provided is a Schottky barrier diode which is configured from a Ga 2 O 3 -based semiconductor, and has a lower rising voltage than a conventional one. In one embodiment, the Schottky barrier diode 1 is provided which has: a semiconductor layer 10 configured from a Ga 2 O 3 -based single crystal; an anode electrode 11 which forms a Schottky junction with the semiconductor layer 10, and has a portion which contacts the semiconductor layer 10 and is composed of Fe or Cu; and a cathode electrode 12.
-
公开(公告)号:EP2755231B1
公开(公告)日:2019-05-22
申请号:EP12829259.6
申请日:2012-08-02
申请人: Tamura Corporation
发明人: SASAKI, Kohei
IPC分类号: H01L21/425 , H01L29/24
-
-
-
-
-
-
-
-
-