公开(公告)号：JP2001277291A

公开(公告)日：2001-10-09

申请号：JP2000101324

申请日：2000-03-31

Applicant: DENSO CORP

Inventor： NIIMI TAKAHISA ,  AOYAMA MASAYUKI

IPC: H05K5/02 ,  B29C45/14

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing the housing body of a portable telephone easily and inexpensively. SOLUTION: The method for manufacturing the housing body of the portable telephone consists of a stage for forming a covering layer to be applied and laminated to the housing body, a stage for arranging the covering layer between a movable mold and a fixed mold, a stage for injecting a molten resin in the cavity formed between the covering layer and the fixed mold, a stage for cooling the resin and a stage for forming the housing body comprising the resin covered with the covering layer.

公开(公告)号：JPH11330302A

公开(公告)日：1999-11-30

申请号：JP13686398

申请日：1998-05-19

Applicant: DENSO CORP

Inventor： KONDO KENJI ,  AOYAMA MASAYUKI

IPC: H01L23/12 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To provide a conductor ball connecting structure for electronic parts, which can connect conductor balls to pads with high strengths and can improve the peeling resistances of the conductor balls. SOLUTION: A wiring layer 3 is formed on the surface of a polyimide tape 2 on which a molded resin section 1 is formed and pads 6 for connecting conductor balls are formed on the opposite surface of the tape 2. Then the wiring layer 3 is connected to the pads 6 through via holes 4. Consequently, the connection reliability between the pads 6 and conductor balls 5 can be improved remarkably.

公开(公告)号：JPH11274363A

公开(公告)日：1999-10-08

申请号：JP7787998

申请日：1998-03-25

Applicant: Denso Corp ,  株式会社デンソー

Inventor： AOYAMA MASAYUKI ,  KONDO KOJI

IPC: H05K1/18 ,  H01L21/60 ,  H01L23/12

CPC classification number: H01L2224/16 ,  H01L2224/45144 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To prevent the occurrence of pure contact between an electric component and a mounting substrate due to external impact. SOLUTION: To An electric component 3 is so allocated as to overlap each of corner electrodes 1b and 4b positioned at nearly square corners, of electrodes 1 and 4 provided in array on the opposite side of an electronic component 2 across a multilayer printed wiring board 5. Thus, the multilayer printed wiring board 5 becomes hard to be deformed at the parts of the corner electrodes 1b and 4b. Consequently, the deformation of the multilayer printed wiring board 5 is suppressed, and poor contact between the electronic component 2 and the multilayer printed wiring board 5 is prevented.

Abstract translation: 要解决的问题：为了防止由于外部冲击而导致电气部件和安装基板之间的纯接触的发生。 解决方案：电气部件3被分配成跨越多层印刷线路板5重叠设置在电子部件2的相反侧的电极1和4的位于几乎正方形角落的角电极1b和4b的每个角电极1b和4b 因此，多层印刷电路板5在角电极1b和4b的部分变得难以变形。 因此，能够抑制多层印刷电路板5的变形，能够防止电子部件2与多层印刷电路板5的接触不良。

公开(公告)号：JPH1146054A

公开(公告)日：1999-02-16

申请号：JP20175197

申请日：1997-07-28

Applicant: DENSO CORP

Inventor： KONDO KENJI ,  AOYAMA MASAYUKI ,  TAKEMOTO MASANORI ,  KONDO KOJI

IPC: H05K1/18 ,  H01L23/12 ,  H05K1/02 ,  H05K1/11 ,  H05K3/34 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a package structure, capable of preventing defective contact between a BGA package and a multilayered printed wiring board, even if it is due to an external impact. SOLUTION: When a solder bump 7 is jointed with the outer peripheral part out of multiple electrodes 2 matrix-arrayed on a multilayered printed wiring board 3, the whole junction part of the solder bump 7 is terminated at the outer peripheral part of the electrode 2a. In other words, when a leading- out wiring which exposes the surface of the substrate 3 is eliminated from the electrode 2a, a crack-starting point can is eliminated, thereby enabling the solder bump 7 to be hardy released from the outermost peripheral electrode 2a, even if it is caused by an external impact. Through these procedures, the defective contact between a BGA package 1 and the multilayered printed wiring board 3 can be avoided.

公开(公告)号：JPH1146053A

公开(公告)日：1999-02-16

申请号：JP19882997

申请日：1997-07-24

Applicant: DENSO CORP

Inventor： AOYAMA MASAYUKI ,  KONDO KENJI ,  TAKEMOTO MASANORI ,  KONDO KOJI

IPC: H01L21/60 ,  H01L23/12 ,  H05K1/11 ,  H05K1/18 ,  H05K3/34 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To avoid a defective contact between an electronic component and a package substrate by a method, wherein the cracking in a packaging substrate caused due to external impacts is avoided for avoiding the disconnection in a leading out wiring arranged in the packaging substrate. SOLUTION: In order to terminate the whole terminal end of the junction of solder bumps 7 with an outermost peripheral electrode 2a at the inner peripheral part of the electrode 2a positioned on the outer periphery from among multiple electrodes 2 arrayed on a multilayered printed wiring board 3, the outer peripheral part of the electrode 2a is covered with a solder resist 10. Through these procedures, since the end part of the outermost peripheral electrode 2a which is most likely to cause crackings does not coincide with the stress concentration point in an external impact time, the cracking in the multilayered printed wiring board 3 is avoided, thereby enabling the defective contact between a BGA package 1 and the multilayered printed wiring board 3 to be prevented.

公开(公告)号：JPH10335516A

公开(公告)日：1998-12-18

申请号：JP14400797

申请日：1997-06-02

Applicant: DENSO CORP

Inventor： AOYAMA MASAYUKI ,  SUZUKI TADAO ,  MATSUMURA YASUSHI ,  TAKEMOTO MASANORI

IPC: H01L23/12 ,  H05K1/11 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To improve the fatigue failure life when a multilayer substrate, on which a highly integrated wiring can be provided using recessed type via holes, is used. SOLUTION: A square-shaped ball grid array package 4 is arranged opposing to the surface of a multilayer printed wiring substrate 1. A plane pad is arranged on the four corners of the region where the square-shaped ball grid array package is provided in the multilayer printed wiring substrate 1, and a via hole pad is arranged on the other region. Said plane pad is soldered to the solder balls 3 for the plane pad protruding from the side of the ball grid array package 4, and the via hole pad is soldered to the via hole solder balls 2 protruding from the side of the ball grid array package 4.

公开(公告)号：JPH10256712A

公开(公告)日：1998-09-25

申请号：JP5914297

申请日：1997-03-13

Applicant: DENSO CORP

Inventor： YAMAMOTO AKIYOSHI ,  HIRAMATSU TOMOYUKI ,  AOYAMA MASAYUKI ,  TAKEMOTO MASANORI ,  KONDO KOJI

IPC: H05K3/34 ,  H05K1/11 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To improve the reliability of the connection of a semiconductor part with a board by preventing the generations of the voids of their solder connection portions. SOLUTION: In a multilayer printed circuit board 12 for mounting a ball grid array package type semiconductor part (BGA part) 11 thereon, surface pads 18 for connecting therewith the bumps of the part 11 are provided and recess-form circular via holes 20 are formed to provide therein via hole pads 19 which are connected with an inner layer conductor pattern 15 of the board 12. After printing cream solders on the pads 18, 19, the BGA part 11 is mounted on the board 12 and they are thereafter passed through a reflow furnace to obtain solder connection portions 13 by integrating the solder bumps and cream solders with each other. Diameter dimensions (a) of the openings of the via holes 20 are set to 150-300 μm which are nearly as large as the dimensions required in order that the cream solders flow in their printing directions, accompanied by their printing operations successively to be filled into the via holes 20. Depth dimensions (b) of the via holes 20 are set to 20-70 μm.

公开(公告)号：JP2006093439A

公开(公告)日：2006-04-06

申请号：JP2004277792

申请日：2004-09-24

Applicant: Denso Corp ,  株式会社デンソー

Inventor： KAMIYA HIROTERU ,  TAKEUCHI SATOSHI ,  SHIMIZU MOTONORI ,  MIYAKE TOSHIHIRO ,  AOYAMA MASAYUKI

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a multilayer substrate improved in both yield and electrical connection reliability between an electric element and a conductor pattern, and also to provide its manufacturing method.
SOLUTION: The multilayer substrate 100 is formed by disposing an electric element 30 in a thermoplastic resin 10 and by electrically connecting an electrode 31 of the electric element 30 to conductor patterns 20, 20a disposed in the thermoplastic resin 10 via a connection material 14 put inside a via hole 13. The thermoplastic resin 10 is constituted by laminating a base film 11 whereon the electric element 30 is mounted in advance and resin films 12a to 12c. Different constituent materials are applied to the base film 11 and the resin films 12a to 12c so that the glass transition point to the melting point (the temperature of lowering of elasticity modulus) of the base film 11 is higher than the glass transition point to the melting point (the temperature of lowering of elasticity modulus) of the resin films 12a to 12c.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种提高电气元件和导体图案之间的屈服和电连接可靠性的多层基板，并且还提供其制造方法。 解决方案：多层基板100通过将电气元件30设置在热塑性树脂10中并且通过将电气元件30的电极31经由连接材料设置在热塑性树脂10中的导体图案20和20a电连接而形成 热塑性树脂10通过预先安装电气元件30的基膜11和树脂膜12a至12c层压而构成。 将不同的构成材料施加到基膜11和树脂膜12a至12c，使得基膜11的玻璃化转变点（弹性模量降低的温度）高于玻璃化转变点 树脂膜12a〜12c的熔点（降低弹性模量的温度）。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005340378A

公开(公告)日：2005-12-08

申请号：JP2004155030

申请日：2004-05-25

Applicant: Denso Corp ,  株式会社デンソー

Inventor： SUZUKI TOSHIO ,  OKUDA RYOICHI ,  KAMIYA HIROTERU ,  MIYAKE TOSHIHIRO ,  AOYAMA MASAYUKI

IPC: H01L23/12

CPC classification number: H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which can have its build made small-sized while reducing wiring resistance and whose processing time can be shortened. SOLUTION: The semiconductor device 100 is equipped with an IC chip 10 which has an electrode 11 on one surface, an insulating substrate 21; a wiring pattern 22 formed on the insulating substrate 21; and a circuit board 20 which includes the wiring pattern 22 as its bottom and is formed of a 1st via hole 24 filled with a 1st connection material 23. The semiconductor also has the electrode 11 and wiring pattern 22 electrically connected to each other through the 1st connection material 23 while the IC chip 10 is mounted on the circuit board 20. The wiring pattern 22 is provided thicker than the electrode 11. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种半导体器件，其可以使其构造小型化，同时降低布线电阻并且可以缩短其处理时间。 解决方案：半导体器件100装备有在一个表面上具有电极11的IC芯片10，绝缘基板21， 形成在绝缘基板21上的布线图案22; 以及布线图案22作为其底部并且由填充有第一连接材料23的第一通孔24形成的电路板20.半导体还具有电极11和布线图案22，其通过第一连接材料彼此电连接 连接材料23，同时将IC芯片10安装在电路板20上。布线图案22被设置为比电极11厚。版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2003332749A

公开(公告)日：2003-11-21

申请号：JP2002223645

申请日：2002-07-31

Applicant: Denso Corp ,  株式会社デンソー

Inventor： MIYAKE TOSHIHIRO ,  TAKEUCHI SATOSHI ,  KONDO KOJI ,  AOYAMA MASAYUKI ,  HARADA TOSHIICHI ,  YAZAKI YOSHITARO ,  TADA KAZUO ,  SHIRAISHI YOSHIHIKO ,  KONISHI SEIJI ,  YAMAZAKI KATSUMI

IPC: H01L23/12 ,  H05K1/16 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/4632 ,  H01L2924/0002 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4617 ,  H05K3/4688 ,  H05K2201/0129 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09672 ,  H05K2203/0361 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a passive device built-in substrate, as well as its fabrication method, that has passive devices built-in such as a capacitor, resistance, etc., and whose structure and manufacturing steps are simplified. SOLUTION: The passive device built-in substrate has multiple resin films 23 including thermoplastic resin, conductor patterns 22 laminated alternately with these multiple resin films 23, and electrically conductible compositions 51 that electrically connect the conductor patterns 22 embedded in via holes 24 formed in each resin film 23 and set on both sides of each resin film 23. A pair of conductor patterns 22a and 22b are arranged on both sides of the resin film 23 at opposite positions with only the resin film 23 between, thus building a passive device functioning as a capacitor 30 in a multilayer substrate. Accordingly, there is no need to use any special materials and others for building the capacitor 30, and its structure is very streamlined. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种内置无源器件的内置基板及其制造方法，其具有诸如电容器，电阻等内置的无源器件，其结构和制造步骤被简化 。 解决方案：无源器件内置衬底具有包括热塑性树脂的多个树脂膜23，与这些多个树脂膜23交替层叠的导体图案22，以及电连接嵌入通孔24中的导体图案22的导电组合物51 每个树脂膜23上形成并设置在每个树脂膜23的两侧。一对导体图案22a和22b布置在树脂膜23的两侧，只有树脂膜23在相对的位置，从而构成被动 器件在多层衬底中用作电容器30。 因此，不需要使用任何特殊的材料和其他来构建电容器30，并且其结构非常流线。 版权所有（C）2004，JPO