公开(公告)号：JP2009206353A

公开(公告)日：2009-09-10

申请号：JP2008048384

申请日：2008-02-28

Applicant: Denso Corp ,  株式会社デンソー

Inventor： HIRAMATSU TOMOYUKI

IPC: H01L21/60

CPC classification number: H01L2924/15311

Abstract: PROBLEM TO BE SOLVED: To provide a mounting method for a semiconductor device in which electric connection can successfully be made between a back electrode provided on a semiconductor package and an electrode provided on a mounting substrate.
SOLUTION: After an oxide film formed on a surface of a solder bump 5 is removed by grinding using a flux component and a grinding member right before a BGA semiconductor device is mounted on the mounting substrate 6, reflow processing is carried out to mount the BGA semiconductor device 1 on the mounting substrate 6. Consequently, the electric connection can be made possible successfully between the back electrode 2a provided on the semiconductor package and the electrode 6a provided on the mounting substrate.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 解决的问题：提供一种其中可以在设置在半导体封装上的背电极和设置在安装基板上的电极之间成功地进行电连接的半导体器件的安装方法。 解决方案：在将BGA半导体器件安装在安装基板6上之前，通过使用助焊剂成分和研磨部件的研磨除去在焊料凸块5的表面上形成的氧化膜之后，进行回流处理 将BGA半导体器件1安装在安装基板6上。因此，可以在设置在半导体封装上的背面电极2a和设置在安装基板上的电极6a之间成功实现电连接。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JPH10256712A

公开(公告)日：1998-09-25

申请号：JP5914297

申请日：1997-03-13

Applicant: DENSO CORP

Inventor： YAMAMOTO AKIYOSHI ,  HIRAMATSU TOMOYUKI ,  AOYAMA MASAYUKI ,  TAKEMOTO MASANORI ,  KONDO KOJI

IPC: H05K3/34 ,  H05K1/11 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To improve the reliability of the connection of a semiconductor part with a board by preventing the generations of the voids of their solder connection portions. SOLUTION: In a multilayer printed circuit board 12 for mounting a ball grid array package type semiconductor part (BGA part) 11 thereon, surface pads 18 for connecting therewith the bumps of the part 11 are provided and recess-form circular via holes 20 are formed to provide therein via hole pads 19 which are connected with an inner layer conductor pattern 15 of the board 12. After printing cream solders on the pads 18, 19, the BGA part 11 is mounted on the board 12 and they are thereafter passed through a reflow furnace to obtain solder connection portions 13 by integrating the solder bumps and cream solders with each other. Diameter dimensions (a) of the openings of the via holes 20 are set to 150-300 μm which are nearly as large as the dimensions required in order that the cream solders flow in their printing directions, accompanied by their printing operations successively to be filled into the via holes 20. Depth dimensions (b) of the via holes 20 are set to 20-70 μm.

公开(公告)号：JP2010118472A

公开(公告)日：2010-05-27

申请号：JP2008290220

申请日：2008-11-12

Applicant: Denso Corp ,  株式会社デンソー

Inventor： HIRAMATSU TOMOYUKI

IPC: H05K3/34 ,  G01N27/04 ,  H01L21/60

CPC classification number: H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a method of testing connecting conditions of an electronic device for detecting not only open failure but also non-wetting failure with higher accuracy.
SOLUTION: The method of testing connecting conditions can test electrical connecting conditions between connecting portions of a solder bump and a land in the electronic device where a plurality of solder bumps arranged at a surface of an electronic component and a plurality of lands formed on electronic component loading surface of a wiring circuit board corresponding to the solder bumps are connected and electronic components are loaded at the upper part of the wiring circuit board. A connecting portion for testing included in the connecting portions is formed of the solder bump for testing formed adjacent to the solder bump at the one surface of the electronic component and the land for testing formed on the wiring circuit board corresponding to the solder bump for testing. This connecting portion, however, does not provide an electrical connecting function. Moreover, a resistance value of the connecting portion for testing can be measured under the condition that an external force is applied to at least one of the electronic component and wiring circuit board in the direction where the electronic component and wiring circuit board at the connecting portion for testing are separated.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于检测电子设备的连接条件的方法，用于不仅检测到开路故障，而且检测到更高精度的非润湿故障。 解决方案：测试连接条件的方法可以测试焊料凸块的连接部分和电子器件中的焊盘之间的电连接条件，其中布置在电子部件的表面处的多个焊料凸块和形成的多个焊盘 在与焊锡凸块相对应的布线电路板的电子部件装载面上连接有电子部件，并在布线电路基板的上部装载电子部件。 包括在连接部分中的用于测试的连接部分由在电子部件的一个表面处的与焊料凸块相邻形成的用于测试的焊料凸块和形成在对应于用于测试的焊料凸块的布线电路板上的测试用焊盘 。 然而，该连接部分不提供电连接功能。 此外，可以在对电子部件和布线电路基板中的至少一个施加外力的情况下，在连接部分的电子部件和布线电路基板的方向上测量用于测试的连接部分的电阻值 测试分开。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2000114315A

公开(公告)日：2000-04-21

申请号：JP27608098

申请日：1998-09-29

Applicant: DENSO CORP

Inventor： AOYAMA MASAYUKI ,  MATSUNAGA YASUAKI ,  AKITA NAOYUKI ,  KONDO KOJI ,  HIRAMATSU TOMOYUKI

IPC: H05K1/18 ,  H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To prolong the service lives of solder bumps which bond a BGA(ball grid array) package to a multilayered printed wiring board. SOLUTION: Of outermost peripheral electrodes 3b and 3c in an array-like arrangement, arranged in such a way that the end sections of the electrodes 3b and 3c positioned to the outermost side of the array-like arrangement, are positioned to the outer side of the end sections of outermost peripheral electrodes 1b positioned to the outermost side of the array-like arrangement. More specifically, the surfaces of the electrodes 3b and 3c are made to cross the surfaces of solder bumps 9 at acute angles in the outermost end section of the array-like arrangement. By making a mounting structure for electronic components constructed in this way, the service lives of the solder bumps 9 can be prolonged, because the stresses to the junctions between the electrodes 3b and 3c and solder bumps 9 can be relaxed.

公开(公告)号：JP2012089742A

公开(公告)日：2012-05-10

申请号：JP2010236469

申请日：2010-10-21

Applicant: Denso Corp ,  株式会社デンソー

Inventor： HIRAMATSU TOMOYUKI

IPC: H05K3/34

Abstract: PROBLEM TO BE SOLVED: To provide a method enabling accurate and easy confirmation of a connecting state of an electronic component with a substrate when manufacturing an electronic device constituted by mounting the electronic component in which an electrode is formed on the back face side to the substrate.SOLUTION: In a land forming process, a first land part 6a is formed in a position covered with a back face electrode 2 when mounted, and a second land part 6b having a width narrower than that of the first land part 6a is formed in an outer position which extends from the first land part 6a and is not covered with the back face electrode 2 when mounted. In a solder paste printing process, solder paste 4 covering a land 6 in a configuration astride the first land part 6a and the second land part 6b is printed. After the solder paste 4 is printed, a reflow process is performed. In the reflow process, with the back face electrode 2 disposed in a position corresponding to the first land part 6a, the solder paste 4 is molten, and jointing is performed while at least part of the solder paste 4 on the second land part 6b side is moved to the back face electrode 2 side.

Abstract translation: 要解决的问题：提供一种能够在制造通过将形成有电极的电子部件安装在背面侧而构成的电子装置时，准确且容易地确认电子部件与基板的连接状态的方法 到基底。 解决方案：在平台形成处理中，在安装时，第一陆部6a形成在被背面电极2覆盖的位置，并且具有比第一陆部6a的宽度窄的宽度的第二陆部6b是 形成在从第一接地部6a延伸并且在安装时未被背面电极2覆盖的外部位置。 在焊膏印刷方法中，印刷了覆盖跨越第一接地部分6a和第二接地部分6b的构型的焊盘6的焊膏4。 在焊膏4被印刷之后，进行回流处理。 在回流工序中，将背面电极2配置在与第一焊盘部6a对应的位置，焊膏4熔融，在第二焊盘部6b侧的焊膏4的至少一部分进行接合 移动到背面电极2侧。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2001007503A

公开(公告)日：2001-01-12

申请号：JP17692499

申请日：1999-06-23

Applicant: DENSO CORP

Inventor： HIRAMATSU TOMOYUKI ,  OGISO HOMARE ,  SONOBE TOSHIO

IPC: H05K3/34 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To provide a mounting method for a BGA(ball grid array) by junctioning via mutual electrodes on a printed circuit board and in which a life against thermal fatigue is effectively improved while the crushing of melted solder is suppressed. SOLUTION: In this mounting method, solder paste 50 is printed on electrodes 21 on a whole surface of a printed circuit board 20, thermosetting resin 41 is applied at the center excepting the electrode area. After that, a BGA 10 having a solder ball 14 on a surface is so mounted on the surface of the printed circuit board 20 as the electrodes 11 and 21 to contact via each solder 14 and 50. At the next process, the solder is melted, additionally the thermosetting resin is so semi-cured as displacement correction of the BGA 10 corresponding to the printed circuit board 20 and crushing suppression of the solder in the heightwise direction to be possible and coagulation of the solder and curing of the thermosetting resin 41 are subsequently performed.

公开(公告)号：JPH11238836A

公开(公告)日：1999-08-31

申请号：JP4054798

申请日：1998-02-23

Applicant: DENSO CORP

Inventor： HIRAMATSU TOMOYUKI

IPC: H01L23/29 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H05K3/28 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To improve thermal fatigue life by eliminating influence of stress which drip-proof material generates, in a package structure of an electronic component which ensures humidity resistance by drip-proof material. SOLUTION: Drip-proof material 10 is constituted of resin having a coefficient of linear expansion of at most 26 ppm/ deg.C and an elastic modulus of at least 1 MPa (or more preferably, a coefficient of linear expansion of 26 ppm/ deg.C and an elastic modulus of 3400 MPa). Thereby influence of compressive stress of the drip-proof material 10 can be restrained, and solder bumps 8 can be scarcely crushed. Thereby imperfect contact which is to be caused by crush of the solder bump 8 can be prevented, and thermal fatigue life can be improved.

公开(公告)号：JPH10284846A

公开(公告)日：1998-10-23

申请号：JP8941997

申请日：1997-04-08

Applicant: DENSO CORP

Inventor： HIRAMATSU TOMOYUKI ,  YAMAMOTO AKIYOSHI ,  AOYAMA MASAYUKI ,  NUMATA AKISHI

IPC: H01L21/60 ,  H01L23/12 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To prevent void connection of soldering and improve reliability of the connection. SOLUTION: BGA (Ball Grid Array) component 21 comprises a grid of bump solder and are connected to the first and second pad, 33 and 34, of the multilayer wiring board 22 by the solder connection 25. The first pad 33 positioned in the outside 2 row is connected to the surface conductor pattern 29. The second pad 34 positioned inside of the pad 33 is connected to the concave viahole formed nearby through the connection 36 and connected to the inner layer conductor pattern 30. The viahole 35 is disposed at an angle of 45 deg. from the second pad 34 and disposed between the pad 33 and 34. The periphery of the connection 36 and viahole 35 is covered by the solder resist 37. As the surface of the first and second pad, 33 and 34, are flat no air is left and the cream solder is printed.

公开(公告)号：JPH10270856A

公开(公告)日：1998-10-09

申请号：JP7568697

申请日：1997-03-27

Applicant: DENSO CORP

Inventor： HIRAMATSU TOMOYUKI ,  TAI HIDEKI ,  AOYAMA MASAYUKI ,  YAMAMOTO AKIYOSHI

IPC: H01L21/60 ,  H01L23/12 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To improve the connection reliability of soldered joints by preventing the occurrence of voids in the joints. SOLUTION: BGA(ball grid array) parts 21 on which solder bumps are arranged in a grid-like state are connected to the first and second pads 33 and 34 of a multilayered wiring board 22 through soldered joints 25. The first pads 33 which are arranged in two rows on the outside are constituted in surface solid pads connected to a surface conductor pattern 29. The second pads 34 arranged in two rows on the inside are connected to an internal layer conductor pattern 30 through blind via holes 35 formed through a surface-side insulating layer 27. The sizes of the second pads 34 become larger than those of the first pads 33, but the sizes of the exposed parts of the pads 34 are made equivalent to those of the pads 33 with a solder resist 36. The multilayered wiring board 22 is manufactured by a subtractive method. Since both the first and second pads 33 and 34 have flat surfaces, cream solder can be printed on the pads 33 and 34 without leaving any air in the printed solder.

公开(公告)号：JPH09237811A

公开(公告)日：1997-09-09

申请号：JP4264996

申请日：1996-02-29

Applicant: DENSO CORP

Inventor： HIRAMATSU TOMOYUKI ,  HARADA YOSHIHARU

IPC: G01R31/26 ,  G01R31/28 ,  H01L21/326 ,  H01L21/66

Abstract: PROBLEM TO BE SOLVED: To provide an wafer burn-in test device capable of securing an electrical connection even wafers are warped and there are uneven bump heights. SOLUTION: A wafer holder 3 has a dented area holding wafer 1 where a cushioning member 4 lies in the sole. An electrode holder 5 has a flexible substrate 6 firmly bonded at the lower part of the holder. The flexible substrate 6 having a bump on a burn-in electrode in accordance with an electrode 2a of the wafer 1 is connected to a connector 8 via wiring pattern 7b. The electrode holder 5 has a dented area 11 in the electrode holder 5 containing an elastic repulsion member 12 made of silicone rubber in the rear of the bump, and the elastic repulsion presses the bump to the wafer 1. By bolting with the bolt 13 upon alignment, the bump and electrode 2a of the wafer 1 is electrically connected by the prescribed pressure with the spring 14 force.