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    반도체 구조물 및 반도체 구조물을 형성하는 방법
    4.
    发明公开
    반도체 구조물 및 반도체 구조물을 형성하는 방법 有权
    半导体结构及其形成方法

    公开(公告)号：KR1020140086807A

    公开(公告)日：2014-07-08

    申请号：KR1020130102989

    申请日：2013-08-29

    申请人： 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드

    发明人： 청해리학레이 ,  첸포니엔 ,  영바오루

    IPC分类号： H01L21/336 ,  H01L29/78

    CPC分类号： H01L21/823462 ,  H01L21/823437 ,  H01L21/82385 ,  H01L21/823857 ,  H01L27/092 ,  H01L29/6684

    摘要： A structure and method of forming the structure are disclosed. According to an embodiment, a structure includes three devices in respective three regions of a substrate. The first device comprises a first gate stack, and the first gate stack comprises a first dielectric layer. The second device comprises a second gate stack, and the second gate stack comprises a second dielectric layer. The third device comprises a third gate stack, and the third gate stack comprises a third dielectric layer. A thickness of the third dielectric layer is less than a thickness of the second dielectric layer, and the thickness of the second dielectric layer is less than a thickness of the first dielectric layer. A gate length of the third gate stack differs in amount from a gate length of the first gate stack and a gate length of the second gate stack.

    摘要翻译： 公开了一种形成该结构的结构和方法。 根据实施例，结构包括在基板的相应三个区域中的三个器件。 第一器件包括第一栅极堆叠，并且第一栅极堆叠包括第一介电层。 第二装置包括第二栅极堆叠，并且第二栅极堆叠包括第二电介质层。 第三器件包括第三栅极堆叠，并且第三栅极堆叠包括第三介电层。 第三电介质层的厚度小于第二电介质层的厚度，第二电介质层的厚度小于第一电介质层的厚度。 第三栅极堆叠的栅极长度与第一栅极堆叠的栅极长度和第二栅极堆叠的栅极长度的量不同。

    강유전체 메모리 소자 및 그 제조 방법
    5.
    发明授权
    강유전체 메모리 소자 및 그 제조 방법 有权
    电磁存储器件及其制造方法

    公开(公告)号：KR101385735B1

    公开(公告)日：2014-04-21

    申请号：KR1020130028676

    申请日：2013-03-18

    申请人： 울산과학기술원 산학협력단

    发明人： 박기복 ,  권순용 ,  전영은 ,  정성철 ,  진한별 ,  곽진성

    IPC分类号： H01L27/115 ,  H01L21/8247

    CPC分类号： H01L21/28291 ,  H01L27/1159 ,  H01L29/6684

    摘要： A ferroelectric memory device according to an embodiment of the present invention includes a substrate, a gate electrode which is arranged on the substrate, a ferroelectric layer which is arranged on the gate electrode, a first insulating layer which is arranged on the ferroelectric layer, a drain electrode which is arranged on a part of the first insulating layer, a second insulating layer which is arranged on the drain electrode, a channel layer which is arranged on the second insulating layer and the first insulating layer, and a source electrode which is arranged on the channel layer. The channel layer is arranged between one side of the drain electrode and the source electrode. One side of the drain electrode and the source electrode are in contact with the channel layer.

    摘要翻译： 根据本发明实施例的铁电存储器件包括衬底，布置在衬底上的栅电极，布置在栅电极上的铁电层，布置在铁电层上的第一绝缘层， 布置在第一绝缘层的一部分上的漏电极，布置在漏电极上的第二绝缘层，布置在第二绝缘层和第一绝缘层上的沟道层，以及布置在第一绝缘层上的源电极 在通道层。 沟道层布置在漏电极的一侧和源电极之间。 漏电极和源电极的一侧与沟道层接触。

    플렉서블 비휘발성 메모리 소자용 강유전체 캐패시터, 플렉서블 비휘발성 강유전체 메모리 소자 및 그의 제조 방법
    7.
    发明公开
    플렉서블 비휘발성 메모리 소자용 강유전체 캐패시터, 플렉서블 비휘발성 강유전체 메모리 소자 및 그의 제조 방법 无效
    用于柔性非易失性存储器件的柔性电容器，柔性非易失性存储器件及其制造方法

    公开(公告)号：KR1020120001657A

    公开(公告)日：2012-01-04

    申请号：KR1020110062839

    申请日：2011-06-28

    申请人： 성균관대학교산학협력단

    发明人： 안종현 ,  노종현

    IPC分类号： H01L27/105 ,  H01L27/115 ,  H01L21/8247

    CPC分类号： H01L21/28291 ,  G11C11/22 ,  H01L21/84 ,  H01L27/1159 ,  H01L27/1203 ,  H01L28/24 ,  H01L29/6684 ,  H01L29/78391 ,  H01L29/517

    摘要： PURPOSE: A ferroelectric capacitor for a flexible nonvolatile memory device, a flexible nonvolatile ferroelectric memory device, and a manufacturing method thereof are provided to improve electric, physical, and chemical properties in an interface between a ferroelectric layer and a semiconductor layer. CONSTITUTION: A contact layer(110) is formed on a flexible substrate(100). A first electrode(120) is formed on the contact layer. A ferroelectric layer(130) is formed on the first electrode. A second electrode(140) is formed on the ferroelectric layer. An insulation layer(150) is formed on the second electrode layer. A polymer protection layer(160) is formed on the second electrode.

    摘要翻译： 目的：提供一种用于柔性非易失性存储器件的强电介质电容器，柔性非易失性铁电存储器件及其制造方法，以改善铁电层和半导体层之间的界面中的电学，物理和化学性质。 构成：在柔性基板（100）上形成接触层（110）。 第一电极（120）形成在接触层上。 铁电层（130）形成在第一电极上。 第二电极（140）形成在铁电层上。 绝缘层（150）形成在第二电极层上。 聚合物保护层（160）形成在第二电极上。

    유-무기 하이브리드 비파괴읽기 박막트랜지스터 강유전체 메모리 및 그 제조방법
    8.
    发明公开
    유-무기 하이브리드 비파괴읽기 박막트랜지스터 강유전체 메모리 및 그 제조방법 有权
    有机无机混合非结晶读出薄膜晶体管随机存取存储器及其生产方法

    公开(公告)号：KR1020100123106A

    公开(公告)日：2010-11-24

    申请号：KR1020090042139

    申请日：2009-05-14

    申请人： 연세대학교 산학협력단

    发明人： 임성일 ,  박찬호

    IPC分类号： H01L21/8247 ,  H01L27/115

    CPC分类号： H01L27/1159 ,  H01L21/28273 ,  H01L21/28291 ,  H01L29/517 ,  H01L29/6684

    摘要： PURPOSE: The inorganic hybrid non-destructive read thin film transistor ferroelectrics memory and manufacturing method thereof use the oxide semiconductor and oxide electrode and the transparency memory device is embodied. CONSTITUTION: The source/drain electrodes(2a, 2b) are formed in the oxide semiconductor(3). The inorganic material intermediate(4) is formed on the oxide semiconductor. The organic ferroelectric(5) is formed on the inorganic material intermediate. The gate electrode(6) is formed on the organic ferroelectric.

    摘要翻译： 目的：实现无机混合非破坏性读取薄膜晶体管铁电体存储器及其制造方法，使用氧化物半导体和氧化物电极，透明性存储器件。 构成：在氧化物半导体（3）中形成源极/漏极（2a，2b）。 无机材料中间体（4）形成在氧化物半导体上。 有机铁电体（5）形成在无机材料中间体上。 栅电极（6）形成在有机铁电体上。

    강유전체 메모리 장치
    9.
    发明公开
    강유전체 메모리 장치 有权
    电磁存储器件，FET及其制造方法

    公开(公告)号：KR1020080063032A

    公开(公告)日：2008-07-03

    申请号：KR1020070058170

    申请日：2007-06-14

    申请人： 서울시립대학교 산학협력단

    发明人： 박병은

    IPC分类号： H01L27/105 ,  H01L27/115 ,  H01L21/8247

    CPC分类号： H01L27/1159 ,  H01L21/28291 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11592 ,  H01L29/6684

    摘要： A ferroelectric memory device, an FET, and manufacturing methods of the same are provided to stabilize a memory operation by improving the hysteresis of a ferroelectric layer. A ferroelectric memory device comprises a substrate(10), a gate electrode(21), a drain electrode(24), a source electrode(25), a channel fabrication layer(22), and a ferroelectric layer(23). The ferroelectric layer is made of a mixture of an inorganic ferroelectric material and an organic material. The channel fabrication layer, such as the organic material or an inorganic semiconductor layer, is formed between the gate electrode and the ferroelectric layer. The channel fabrication layer is an insulation layer.

    摘要翻译： 提供铁电存储器件，FET及其制造方法，以通过改善铁电层的滞后来稳定存储器操作。 铁电存储器件包括衬底（10），栅电极（21），漏电极（24），源电极（25），通道制造层（22）和铁电层（23）。 铁电层由无机铁电材料和有机材料的混合物制成。 沟道制造层，例如有机材料或无机半导体层，形成在栅电极和铁电层之间。 通道制造层是绝缘层。

    ＭＦＭＯＳ/ＭＦＭＳ 비휘발성 메모리 트랜지스터 및 그제조방법
    10.
    发明公开
    ＭＦＭＯＳ/ＭＦＭＳ 비휘발성 메모리 트랜지스터 및 그제조방법 无效
    金属 - 金属氧化物半导体/金属 - 金属半导体非易失性存储晶体管及其制造方法

    公开(公告)号：KR1020020066997A

    公开(公告)日：2002-08-21

    申请号：KR1020020007479

    申请日：2002-02-08

    申请人： 샤프 가부시키가이샤

    发明人： 슈솅텡 ,  장펭얀 ,  리팅카이

    IPC分类号： H01L27/105

    CPC分类号： H01L29/6684 ,  H01L21/28291 ,  H01L29/78391

    摘要： PURPOSE: A method for fabricating a metal-ferro-metal oxide semiconductor(MFMOS)/metal-ferro-metal semiconductor(MFMS) non-volatile memory transistors is provided to prevent a ferroelectric material from being damaged in a plasma etching process by obviating the necessity of a gate stack etching process and minimizing etch-inducing damage. CONSTITUTION: A bottom electrode(16) is formed. A ferroelectric layer(24) is deposited over an active region beyond the margins of the bottom electrode. A top electrode(26) is deposited on the ferroelectric layer. A structure obtained by the above-described steps is metalized to form a source electrode(32), a gate electrode(34) and a drain electrode(36).

    摘要翻译： 目的：提供一种用于制造金属 - 铁金属氧化物半导体（MFMOS）/金属 - 铁金属半导体（MFMS）非易失性存储晶体管的方法，以防止在等离子体蚀刻工艺中铁电材料被损坏， 栅极堆叠蚀刻工艺的必要性和最小化蚀刻诱导损伤。 构成：形成底部电极（16）。 在超过底部电极的边缘的有源区域上沉积铁电层（24）。 顶层电极（26）沉积在铁电层上。 通过上述步骤获得的结构被金属化以形成源电极（32），栅电极（34）和漏电极（36）。