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公开(公告)号:US08809851B2
公开(公告)日:2014-08-19
申请号:US13101644
申请日:2011-05-05
申请人: Shunpei Yamazaki , Kiyoshi Kato , Yutaka Shionoiri , Yusuke Sekine , Kazuma Furutani , Hiromichi Godo
发明人: Shunpei Yamazaki , Kiyoshi Kato , Yutaka Shionoiri , Yusuke Sekine , Kazuma Furutani , Hiromichi Godo
IPC分类号: H01L29/12
CPC分类号: H01L29/7869 , G11C16/0433 , G11C16/26 , H01L27/11521 , H01L27/1156 , H01L27/1225 , H01L28/40 , H01L29/41733 , H01L29/78621
摘要: A semiconductor device including a first transistor and a second transistor and a capacitor which are over the first transistor is provided. A semiconductor layer of the second transistor includes an offset region. In the second transistor provided with an offset region, the off-state current of the second transistor can be reduced. Thus, a semiconductor device which can hold data for a long time can be provided.
摘要翻译: 提供了包括在第一晶体管之上的第一晶体管和第二晶体管和电容器的半导体器件。 第二晶体管的半导体层包括偏移区域。 在设置有偏移区域的第二晶体管中,可以减小第二晶体管的截止电流。 因此,可以提供能够长时间保持数据的半导体器件。
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公开(公告)号:US08750023B2
公开(公告)日:2014-06-10
申请号:US13230122
申请日:2011-09-12
申请人: Kazuma Furutani , Yutaka Shionoiri
发明人: Kazuma Furutani , Yutaka Shionoiri
IPC分类号: G11C11/24
CPC分类号: G11C16/02 , G11C11/404 , G11C11/405 , G11C2207/2236
摘要: An object is to provide a semiconductor memory device capable of copying memory data without using an external circuit. The semiconductor memory device includes a bit line to which first terminals of a plurality of memory cells are connected in common; a pre-charge circuit which is connected to the bit line and pre-charges the bit line with a specific potential in data reading; a data holding circuit comprising a capacitor which temporarily holds data read out from the memory cell or data which is written to the memory cell; and an inverted data output circuit which outputs inverted data of data held in the data holding circuit to the bit line. The inverted data output circuit includes a means for controlling output of inverted data of data held in the data holding circuit.
摘要翻译: 本发明的目的是提供一种能够在不使用外部电路的情况下复制存储器数据的半导体存储器件。 半导体存储器件包括多个存储器单元的第一端子共同连接的位线; 连接到位线的预充电电路,并在数据读取中对具有特定电位的位线进行预充电; 一种数据保持电路,包括暂时保存从存储单元读出的数据或写入存储单元的数据的电容器; 以及将保持在数据保持电路中的数据的反相数据输出到位线的反相数据输出电路。 反相数据输出电路包括用于控制保持在数据保持电路中的数据的反相数据的输出的装置。
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公开(公告)号:US08224277B2
公开(公告)日:2012-07-17
申请号:US12565937
申请日:2009-09-24
申请人: Kazuma Furutani
发明人: Kazuma Furutani
CPC分类号: H01L23/645 , G06K19/0723 , G06K19/07749 , H01L27/12 , H01L27/1214 , H01L27/1266 , H01L2223/6677 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要: An object is to provide a semiconductor device which operates normally even when the communication distance is extremely short, while the maximum communication distance is maintained, and which can make amplitude of a response waveform large even when a large amount of electric power is supplied to the semiconductor device and a protection circuit operates. The object is achieved with a semiconductor device including a first modulation circuit and a second modulation circuit each of which performs load modulation by an input signal, a detection circuit which determines an output signal by electric power supplied externally, a protection circuit which is controlled by the output signal of the detection circuit, and a modulation selecting circuit which switches the first modulation circuit and the second modulation circuit depending on the output signal of the detection circuit.
摘要翻译: 目的在于提供即使在通信距离非常短的情况下正常工作的半导体装置,同时保持最大通信距离,并且即使当大量的电力被提供给 半导体器件和保护电路工作。 该目的是通过包括第一调制电路和第二调制电路的半导体器件实现的,所述第一调制电路和第二调制电路通过输入信号进行负载调制,检测电路通过外部供电确定输出信号,保护电路由 检测电路的输出信号,以及根据检测电路的输出信号切换第一调制电路和第二调制电路的调制选择电路。
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公开(公告)号:US08159193B2
公开(公告)日:2012-04-17
申请号:US11960014
申请日:2007-12-19
申请人: Kiyoshi Kato , Kazuma Furutani
发明人: Kiyoshi Kato , Kazuma Furutani
摘要: A semiconductor device which can operate normally even when the communication distance is extremely short, and which stores excess electric power which is not needed for circuit operation of the semiconductor device when a large amount of electric power is supplied thereto. The following are included: an antenna; a first AC/DC converter circuit which is connected to the antenna; a second AC/DC converter circuit which is connected to the antenna through a switching element; a detecting circuit which controls operation of the switching element in accordance with the value of a voltage output from the first AC/DC converter circuit; and a battery which stores electric power supplied from the antenna through the second AC/DC converter circuit. When the switching element is operated, electric power supplied from outside is at least partly supplied to the battery through the second AC/DC converter circuit.
摘要翻译: 即使在通信距离非常短的情况下也能正常工作的半导体装置,并且当供给大量的电力时存储对于半导体装置的电路运行不需要的多余的电力。 包括以下内容:天线; 连接到天线的第一AC / DC转换器电路; 通过开关元件连接到天线的第二AC / DC转换器电路; 检测电路,其根据从所述第一AC / DC转换器电路输出的电压的值来控制所述开关元件的动作; 以及通过第二AC / DC转换器电路存储从天线提供的电力的电池。 当操作开关元件时,通过第二AC / DC转换器电路至少部分地将从外部供电的电力提供给电池。
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公开(公告)号:US20120063206A1
公开(公告)日:2012-03-15
申请号:US13230122
申请日:2011-09-12
申请人: Kazuma Furutani , Yutaka Shionoiri
发明人: Kazuma Furutani , Yutaka Shionoiri
IPC分类号: G11C11/24
CPC分类号: G11C16/02 , G11C11/404 , G11C11/405 , G11C2207/2236
摘要: An object is to provide a semiconductor memory device capable of copying memory data without using an external circuit. The semiconductor memory device includes a bit line to which first terminals of a plurality of memory cells are connected in common; a pre-charge circuit which is connected to the bit line and pre-charges the bit line with a specific potential in data reading; a data holding circuit comprising a capacitor which temporarily holds data read out from the memory cell or data which is written to the memory cell; and an inverted data output circuit which outputs inverted data of data held in the data holding circuit to the bit line. The inverted data output circuit includes a means for controlling output of inverted data of data held in the data holding circuit.
摘要翻译: 本发明的目的是提供一种能够在不使用外部电路的情况下复制存储器数据的半导体存储器件。 半导体存储器件包括多个存储器单元的第一端子共同连接的位线; 连接到位线的预充电电路,并在数据读取中对具有特定电位的位线进行预充电; 一种数据保持电路,包括暂时保存从存储单元读出的数据或写入存储单元的数据的电容器; 以及将保持在数据保持电路中的数据的反相数据输出到位线的反相数据输出电路。 反相数据输出电路包括用于控制保持在数据保持电路中的数据的反相数据的输出的装置。
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公开(公告)号:US08339106B2
公开(公告)日:2012-12-25
申请号:US13447397
申请日:2012-04-16
申请人: Kiyoshi Kato , Kazuma Furutani
发明人: Kiyoshi Kato , Kazuma Furutani
摘要: A semiconductor device which can operate normally even when the communication distance is extremely short, and which stores excess electric power which is not needed for circuit operation of the semiconductor device when a large amount of electric power is supplied thereto. The following are included: an antenna; a first AC/DC converter circuit which is connected to the antenna; a second AC/DC converter circuit which is connected to the antenna through a switching element; a detecting circuit which controls operation of the switching element in accordance with the value of a voltage output from the first AC/DC converter circuit; and a battery which stores electric power supplied from the antenna through the second AC/DC converter circuit. When the switching element is operated, electric power supplied from outside is at least partly supplied to the battery through the second AC/DC converter circuit.
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公开(公告)号:US20120200255A1
公开(公告)日:2012-08-09
申请号:US13447397
申请日:2012-04-16
申请人: Kiyoshi Kato , Kazuma Furutani
发明人: Kiyoshi Kato , Kazuma Furutani
IPC分类号: H02J7/00
摘要: A semiconductor device which can operate normally even when the communication distance is extremely short, and which stores excess electric power which is not needed for circuit operation of the semiconductor device when a large amount of electric power is supplied thereto. The following are included: an antenna; a first AC/DC converter circuit which is connected to the antenna; a second AC/DC converter circuit which is connected to the antenna through a switching element; a detecting circuit which controls operation of the switching element in accordance with the value of a voltage output from the first AC/DC converter circuit; and a battery which stores electric power supplied from the antenna through the second AC/DC converter circuit. When the switching element is operated, electric power supplied from outside is at least partly supplied to the battery through the second AC/DC converter circuit.
摘要翻译: 即使在通信距离非常短的情况下也能正常工作的半导体装置,并且当供给大量的电力时存储对于半导体装置的电路运行不需要的多余的电力。 包括以下内容:天线; 连接到天线的第一AC / DC转换器电路; 通过开关元件连接到天线的第二AC / DC转换器电路; 检测电路,其根据从所述第一AC / DC转换器电路输出的电压的值来控制所述开关元件的动作; 以及通过第二AC / DC转换器电路存储从天线提供的电力的电池。 当操作开关元件时,通过第二AC / DC转换器电路至少部分地将从外部供电的电力提供给电池。
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公开(公告)号:USD645029S1
公开(公告)日:2011-09-13
申请号:US29327248
申请日:2008-11-03
申请人: Yuto Yakubo , Kazuma Furutani
设计人: Yuto Yakubo , Kazuma Furutani
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公开(公告)号:US20110176355A1
公开(公告)日:2011-07-21
申请号:US13004942
申请日:2011-01-12
申请人: Kazuma Furutani , Yoshinori Ieda , Yuto Yakubo , Kiyoshi Kato , Shunpei Yamazaki
发明人: Kazuma Furutani , Yoshinori Ieda , Yuto Yakubo , Kiyoshi Kato , Shunpei Yamazaki
IPC分类号: G11C11/24
CPC分类号: H01L27/1214 , G11C11/403 , G11C16/0425 , G11C16/0433 , H01L27/1156 , H01L27/1225
摘要: A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.
摘要翻译: 半导体器件具有包括写入晶体管的非易失性存储单元,该晶体管包括氧化物半导体,并且在源极和漏极之间的截止状态下具有小的漏电流,读取晶体管包括与写入晶体管不同的半导体材料, 和电容器。 通过接通写入晶体管并将数据写入或重写到存储器单元中,并将电位施加到写入晶体管的源极和漏极,电容器的一个电极和读取的晶体管的栅电极之一的节点 彼此电连接,然后关闭写入晶体管,使得预定量的电荷被保持在节点中。
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公开(公告)号:US08780629B2
公开(公告)日:2014-07-15
申请号:US13004942
申请日:2011-01-12
申请人: Kazuma Furutani , Yoshinori Ieda , Yuto Yakubo , Kiyoshi Kato , Shunpei Yamazaki
发明人: Kazuma Furutani , Yoshinori Ieda , Yuto Yakubo , Kiyoshi Kato , Shunpei Yamazaki
IPC分类号: G11C11/34 , G11C11/24 , G11C16/04 , H01L29/788
CPC分类号: H01L27/1214 , G11C11/403 , G11C16/0425 , G11C16/0433 , H01L27/1156 , H01L27/1225
摘要: A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.
摘要翻译: 半导体器件具有包括写入晶体管的非易失性存储单元,该晶体管包括氧化物半导体,并且在源极和漏极之间的截止状态下具有小的漏电流,读取晶体管包括与写入晶体管不同的半导体材料, 和电容器。 通过接通写入晶体管并将数据写入或重写到存储器单元中,并将电位施加到写入晶体管的源极和漏极,电容器的一个电极和读取的晶体管的栅电极之一的节点 彼此电连接,然后关闭写入晶体管,使得预定量的电荷被保持在节点中。
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