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公开(公告)号:US08012785B2
公开(公告)日:2011-09-06
申请号:US12429305
申请日:2009-04-24
申请人: Kai-Chih Liang , Hua-Shu Wu , Li-Chun Peng , Tsung-Cheng Huang , Mingo Liu , Nick Y. M. Shen , Allen Timothy Chang
发明人: Kai-Chih Liang , Hua-Shu Wu , Li-Chun Peng , Tsung-Cheng Huang , Mingo Liu , Nick Y. M. Shen , Allen Timothy Chang
CPC分类号: B81C1/00246 , B81B2201/0257 , B81C2201/056 , B81C2203/0714 , B81C2203/0728
摘要: An embodiment of a method is provided that includes providing a substrate having a frontside and a backside. A CMOS device is formed on the substrate. A MEMS device is also formed on the substrate. Forming the MEMS device includes forming a MEMS mechanical structure on the frontside of the substrate. The MEMS mechanical structure is then released. A protective layer is formed on the frontside of the substrate. The protective layer is disposed on the released MEMS mechanical structure (e.g., protects the MEMS structure). The backside of the substrate is processed while the protective layer is disposed on the MEMS mechanical structure.
摘要翻译: 提供了一种方法的实施例,其包括提供具有前侧和后侧的基底。 在衬底上形成CMOS器件。 在该基板上也形成有MEMS器件。 形成MEMS器件包括在衬底的前侧形成MEMS机械结构。 然后释放MEMS机械结构。 在基板的前侧形成有保护层。 保护层设置在释放的MEMS机械结构上(例如,保护MEMS结构)。 在保护层设置在MEMS机械结构上的同时处理衬底的背面。
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公开(公告)号:US07732299B2
公开(公告)日:2010-06-08
申请号:US11673652
申请日:2007-02-12
申请人: Fa-Yuan Chang , Tsung-Mu Lai , Kai-Chih Liang , Hua-Shu Wu , Chin-Hsiang Ho , Gwo-Yuh Shiau , Chu-Wei Cheng , Ming-Chyi Liu , Yuan-Chih Hsieh , Chia-Shiung Tsai , Nick Y. M. Shen , Ching-Chung Pai
发明人: Fa-Yuan Chang , Tsung-Mu Lai , Kai-Chih Liang , Hua-Shu Wu , Chin-Hsiang Ho , Gwo-Yuh Shiau , Chu-Wei Cheng , Ming-Chyi Liu , Yuan-Chih Hsieh , Chia-Shiung Tsai , Nick Y. M. Shen , Ching-Chung Pai
IPC分类号: H01L21/338 , H01L21/30 , H01L21/46
CPC分类号: H01L23/585 , B81C1/0038 , B81C1/00611 , B81C2201/0125 , H01L21/31053 , H01L21/31056 , H01L27/1464 , H01L27/14687 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要: The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a top metal layer on a first substrate, in which the top metal layer has a plurality of interconnect features and a first dummy feature; forming a first dielectric layer over the top metal layer; etching the first dielectric layer in a target region substantially vertically aligned to the plurality of interconnect features and the first dummy feature of the top metal layer; performing a chemical mechanical polishing (CMP) process over the first dielectric layer; and thereafter bonding the first substrate to a second substrate.
摘要翻译: 本公开提供了一种制造微电子器件的方法。 该方法包括在第一衬底上形成顶部金属层,其中顶部金属层具有多个互连特征和第一虚拟特征; 在顶部金属层上形成第一介电层; 在与多个互连特征和顶部金属层的第一虚拟特征基本上垂直对准的目标区域中蚀刻第一介电层; 在第一介电层上进行化学机械抛光(CMP)工艺; 然后将第一基板接合到第二基板。
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公开(公告)号:US20080194076A1
公开(公告)日:2008-08-14
申请号:US11673652
申请日:2007-02-12
申请人: Fa-Yuan Chang , Tsung-Mu Lai , Kai-Chih Liang , Hua-Shu Wu , Chin-Hsiung Ho , Gwo-Yuh Shiau , Chu-Wei Chang , Ming-Chyi Liu , Yuan-Chih Hsieh , Chia-Shiung Tsai , Nick Y. M. Shen , Ching-Chung Pai
发明人: Fa-Yuan Chang , Tsung-Mu Lai , Kai-Chih Liang , Hua-Shu Wu , Chin-Hsiung Ho , Gwo-Yuh Shiau , Chu-Wei Chang , Ming-Chyi Liu , Yuan-Chih Hsieh , Chia-Shiung Tsai , Nick Y. M. Shen , Ching-Chung Pai
IPC分类号: H01L21/98
CPC分类号: H01L23/585 , B81C1/0038 , B81C1/00611 , B81C2201/0125 , H01L21/31053 , H01L21/31056 , H01L27/1464 , H01L27/14687 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要: The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a top metal layer on a first substrate, in which the top metal layer has a plurality of interconnect features and a first dummy feature; forming a first dielectric layer over the top metal layer; etching the first dielectric layer in a target region substantially vertically aligned to the plurality of interconnect features and the first dummy feature of the top metal layer; performing a chemical mechanical polishing (CMP) process over the first dielectric layer; and thereafter bonding the first substrate to a second substrate.
摘要翻译: 本公开提供了一种制造微电子器件的方法。 该方法包括在第一衬底上形成顶部金属层,其中顶部金属层具有多个互连特征和第一虚拟特征; 在顶部金属层上形成第一介电层; 在与多个互连特征和顶部金属层的第一虚拟特征基本上垂直对准的目标区域中蚀刻第一介电层; 在第一介电层上进行化学机械抛光(CMP)工艺; 然后将第一基板接合到第二基板。
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