-
公开(公告)号：US20220108975A1
公开(公告)日：2022-04-07
申请号：US17492356
申请日：2021-10-01
Applicant: STMICROELECTRONICS S.r.l. , STMICROELECTRONICS S.r.l.
Inventor： Cristina MANOLA , Rosa Lucia TORRISI , Simone RASCUNÀ , Gabriele BELLOCCHI , Annalinda CONTINO , Giuseppe MACCARRONE
IPC: H01L23/00 , H01L23/495 , B22F9/24 , B22F1/00
Abstract: The disclosure is directed to wide band-gap semiconductor devices, such as power devices based on silicon carbide or gallium nitride materials. A power device die is attached to a carrier substrate or a base using sintered silver as a die attachment material or layer. The carrier substrate is, in some embodiments, copper plated with silver. The sintered silver die attachment layer is formed by sintering silver nanoparticle paste under a very low temperature, for example, lower than 200° C. and in some embodiments at about 150° C., and with no external pressures applied in the sintering process. The silver nanoparticle is synthesized through a chemical reduction process in an organic solvent. After the reduction process has completed, the organic solvent is removed through evaporation with a flux of inert gas being injected into the solution.
-
公开(公告)号：US12285534B2
公开(公告)日：2025-04-29
申请号：US17328435
申请日：2021-05-24
Inventor： Roberto La Rosa , Jean Camiolo , Laurent Yvan Louis Jamet
Abstract: A system to sanitize a surface includes an emitter. The emitter of the system to sanitize the surface includes: a light source configured to generate light at a sanitizing wavelength; a receiver configured to receive a wireless signal; and a processing circuit for the emitter configured to turn the light source on, turn the light source off, and adjust an intensity of light generated by the light source depending on the wireless signal. The system to sanitize the surface further includes a sensor. The sensor of the system to sanitize the surface includes: a photoelectric transducer configured to convert light at the sanitizing wavelength to a current; and a processing circuit for the sensor powered by the current and in communication with a transmitter to transmit the wireless signal, the processing circuit for the sensor being configured to control emission of the wireless signal depending on a power level supplied by the current.
-
公开(公告)号：US12284248B2
公开(公告)日：2025-04-22
申请号：US18360692
申请日：2023-07-27
Applicant: STMICROELECTRONICS S.r.l.
Abstract: The present disclosure is directed to a device and method for generating and transmitting a TDM signal including both raw data and processed data. The device includes a sensor having a time division multiplexing (TDM) interface. The TDM interface transmits both raw data and processed data in a single TDM signal by reserving one or more slots inside a TDM frame for transmission of the processed data. The sensor also embeds additional information inside a data stream of raw data by repurposing one or more of values of the raw data as an exception code, flag, or another type of notification. The device is also enabled to transmit data, and disabled when not in use in order to conserve power.
-
公开(公告)号：US20250126877A1
公开(公告)日：2025-04-17
申请号：US18986599
申请日：2024-12-18
Inventor： Pierpaolo MONGE ROFFARELLO , Isabella MICA , Didier DUTARTRE , Alexandra ABBADIE
IPC: H10D84/03 , H01L21/02 , H01L21/324 , H01L21/763 , H10D84/01 , H10D84/40
Abstract: A substrate made of doped single-crystal silicon has an upper surface. A doped single-crystal silicon layer is formed by epitaxy on top of and in contact with the upper surface of the substrate. Either before or after forming the doped single-crystal silicon layer, and before any other thermal treatment step at a temperature in the range from 600° C. to 900° C., a denuding thermal treatment is applied to the substrate for several hours. This denuding thermal treatment is at a temperature higher than or equal to 1,000° C.
-
公开(公告)号：US20250119061A1
公开(公告)日：2025-04-10
申请号：US18989356
申请日：2024-12-20
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alberto CATTANI , Stefano RAMORINI , Alessandro GASPARINI
Abstract: A DC-DC converter circuit includes a switching stage with first and second switches, and a control circuit coupled to the switching stage. The control circuit detects a threshold for changing between a synchronous operation mode and an asynchronous operation mode, synchronizes the detected threshold with a beginning of a new switching cycle, applies feed-forward compensation at the beginning of an ON-time period to vary a duty cycle, and generates drive signals to control the switching stage.
-
Patent Agency Ranking
公开(公告)号：US20250111876A1
公开(公告)日：2025-04-03
申请号：US18978540
申请日：2024-12-12
Inventor： Antonino CONTE , Francesco LA ROSA
Abstract: Unclonable function circuitry includes a plurality of pairs of phase-change memory cells in a virgin state, and sensing circuitry coupled to the plurality of pairs of phase-change memory cells in the virgin state. The sensing circuitry identifies a subset of the plurality of pairs of phase-change memory cells in the virgin state based on a reliability mask. Signs of differences of effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state are sensed by the sensing circuitry. The sensing circuitry generates a string of bits based on the sensed signs of differences in the effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state. Processing circuitry coupled to the unclonable function circuitry, in operation, executes one or more operations using the generated string of bits.
-
公开(公告)号：US12267078B2
公开(公告)日：2025-04-01
申请号：US18352581
申请日：2023-07-14
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Matteo Quartiroli , Alessandro Mecchia , Paolo Pesenti
Abstract: A device includes a local oscillator, an all-digital phase-locked loop, a digital signal generator, sampling circuitry, and an interface. The local oscillator generates a local clock signal. The all-digital phase locked loop generates a sampling control signal. The ADPLL includes a phase-error detector, a digital filter and a sigma-delta modulator. The phase detector generates a phase error signal based on a loop clock signal and a received reference signal. The digital filter generates a signal indicative of a frequency ratio between a frequency of the reference clock signal and the local clock frequency based on the phase error signal. The sigma-delta modulator generates a modulated signal based on the signal indicative of the frequency ratio. The sampling control signal is based on the modulated signal. The sampling circuitry samples digital signals generated by the digital signal generator at a sampling frequency, which is a function of the sampling control signal.
-
公开(公告)号：US12260910B2
公开(公告)日：2025-03-25
申请号：US18148380
申请日：2022-12-29
Applicant: STMICROELECTRONICS S.r.l.
IPC: G11C13/00
Abstract: The present disclosure is directed to a sense amplifier architecture for a memory device having a plurality of memory cells. Groups of non-volatile memory cells store respective codewords formed by stored logic states, logic high or logic low, of the memory cells of the group. The sense amplifier architecture has a plurality of sense amplifier reading branches, each sense amplifier reading branch coupled to a respective memory cell and configured to provide an output signal, which is indicative of a cell current flowing through the same memory cell; a comparison stage, to perform a comparison between the cell currents of memory cells of a group; and a logic stage, to determine, based on comparison results provided by the comparison stage, a read codeword corresponding to the group of memory cells. Information may be stored in different subsets of codewords, the sense amplifier architecture in this case having a subset definition circuit, to allow a preliminary determination of the subset to which a codeword to be read belongs to, based on reference signals.
-
公开(公告)号：US12218231B2
公开(公告)日：2025-02-04
申请号：US17116465
申请日：2020-12-09
Applicant: STMicroelectronics S.r.l.
Inventor： Ferdinando Iucolano , Alessandro Chini
IPC: H01L29/778 , H01L29/20 , H01L29/205 , H01L29/40 , H01L29/66
Abstract: An HEMT transistor includes a semiconductor body having a semiconductive heterostructure. A gate region, of conductive material, is arranged above and in contact with the semiconductor body. A first insulating layer extends over the semiconductor body, laterally to the conductive gate region. A second insulating layer extends over the first insulating layer and the gate region. A first field plate region, of conductive material, extends between the first and the second insulating layers, laterally spaced from the conductive gate region along a first direction. A second field plate region, of conductive material, extends over the second insulating layer, and the second field plate region overlies and is vertically aligned with the first field plate region.
-
公开(公告)号：US12216488B2
公开(公告)日：2025-02-04
申请号：US17507545
申请日：2021-10-21
Applicant: STMicroelectronics S.r.l.
Inventor： Domenico Tripodi
Abstract: A system including an asynchronous finite state machine that transitions from a first state to a second state in response to receiving a virtual-clock event signal. The system further includes a trigger circuit that asserts a trigger signal when a first-state asynchronous event signal is asserted while the asynchronous finite state machine is in the first state. The system further including a virtual clock-pulse circuit configured to generate the virtual-clock event signal after receiving the trigger signal.
-
-
-
-
-
-
-
-
-
Search Results
5497
records
(took 0.025 seconds)
