公开(公告)号：US08766723B1

公开(公告)日：2014-07-01

申请号：US13439130

申请日：2012-04-04

Applicant: Wayne A. Loeb ,  David M. Signoff

Inventor： Wayne A. Loeb ,  David M. Signoff

IPC: H03F3/26

CPC classification number: H03F3/19 ,  H03F3/245 ,  H03F3/265 ,  H03F3/45475 ,  H03F3/68 ,  H03F2200/405 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45731

Abstract: Methods and devices provide for power amplification in a push pull power amplifier. A circuit comprises an input stage, a power amplifier stage and an output stage. The input stage provides a plurality of control voltages based on a control current. The input stage may include a transformer with a primary side and two secondary sides. A power amplifier stage comprises an NMOS transistor and a PMOS transistor arranged in a push-pull configuration to generate a plurality of amplified signals. The transistors may be in a common gate arrangement. The output stage combines the amplified signals and generates an output voltage. The output stage may include a transformer with two primary sides and a secondary side.

Abstract translation: 方法和装置在推挽功率放大器中提供功率放大。 电路包括输入级，功率放大级和输出级。 输入级基于控制电流提供多个控制电压。 输入级可以包括具有初级侧和两个次级侧的变压器。 功率放大器级包括以推挽配置布置的NMOS晶体管和PMOS晶体管，以产生多个放大信号。 晶体管可以是共同的栅极布置。 输出级组合放大的信号并产生输出电压。 输出级可以包括具有两个初级侧和次级侧的变压器。

公开(公告)号：US08362826B1

公开(公告)日：2013-01-29

申请号：US13462968

申请日：2012-05-03

Applicant: David M. Signoff ,  Wayne A. Loeb

Inventor： David M. Signoff ,  Wayne A. Loeb

IPC: G05F1/10

CPC classification number: H03F1/30 ,  H03F3/195 ,  H03F3/24 ,  H03F3/3001 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/411 ,  H03F2200/447 ,  H03F2200/555

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract translation: 描述了减少短通道放大器的增益变化的放大器偏置电路，为短通道放大器产生恒定的Gm偏置信号的放大器偏置电路以及有利地结合两种类型的放大器偏置电路的实施例的多级放大器。 两个放大器偏置电路方法都使用运算放大器来均衡内部偏置电路电压。 恒定Gm偏置电路产生1 / R的Gm，其中R是微调电阻值的值。 降低增益变化的偏置电路产生大约1 / R的Gm，其中R是调整电阻值的值，然而，偏置电路可配置为调整偏置电路Gm以减轻宽范围电路的影响 特定的特性和电路可以使用的操作环境的变化范围，例如温度变化。

公开(公告)号：US08174307B1

公开(公告)日：2012-05-08

申请号：US13193998

申请日：2011-07-29

Applicant: David M. Signoff ,  Wayne A. Loeb

Inventor： David M. Signoff ,  Wayne A. Loeb

IPC: G05F1/10

CPC classification number: H03F1/30 ,  H03F3/195 ,  H03F3/24 ,  H03F3/3001 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/411 ,  H03F2200/447 ,  H03F2200/555

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract translation: 描述了减少短通道放大器的增益变化的放大器偏置电路，为短通道放大器产生恒定的Gm偏置信号的放大器偏置电路以及有利地结合两种类型的放大器偏置电路的实施例的多级放大器。 两个放大器偏置电路方法都使用运算放大器来均衡内部偏置电路电压。 恒定Gm偏置电路产生1 / R的Gm，其中R是微调电阻值的值。 降低增益变化的偏置电路产生大约1 / R的Gm，其中R是调整电阻值的值，然而，偏置电路可配置为调整偏置电路Gm以减轻宽范围电路的影响 特定的特性和电路可以使用的操作环境的变化范围，例如温度变化。

公开(公告)号：US20110273261A1

公开(公告)日：2011-11-10

申请号：US13099622

申请日：2011-05-03

Applicant: David M. Signoff ,  Wayne A. Loeb

Inventor： David M. Signoff ,  Wayne A. Loeb

IPC: H01F27/36

CPC classification number: H01F27/367

Abstract: In one embodiment, an apparatus includes an inductor and an electrically conductive structure surrounding the inductor. The electrically conductive structure conducts a current when a first magnetic field passes through the electrically conductive structure. The current creates a second magnetic field opposing the first magnetic field.

Abstract translation: 在一个实施例中，装置包括电感器和围绕电感器的导电结构。 当第一磁场通过导电结构时，导电结构传导电流。 电流产生与第一磁场相反的第二磁场。

公开(公告)号：US07994847B1

公开(公告)日：2011-08-09

申请号：US12606746

申请日：2009-10-27

Applicant: David M. Signoff ,  Wayne A. Loeb

Inventor： David M. Signoff ,  Wayne A. Loeb

IPC: G05F1/10

CPC classification number: H03F1/30 ,  H03F3/195 ,  H03F3/24 ,  H03F3/3001 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/411 ,  H03F2200/447 ,  H03F2200/555

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract translation: 描述了减少短通道放大器的增益变化的放大器偏置电路，为短通道放大器产生恒定的Gm偏置信号的放大器偏置电路以及有利地结合两种类型的放大器偏置电路的实施例的多级放大器。 两个放大器偏置电路方法都使用运算放大器来均衡内部偏置电路电压。 恒定Gm偏置电路产生1 / R的Gm，其中R是微调电阻值的值。 降低增益变化的偏置电路产生大约1 / R的Gm，其中R是调整电阻值的值，然而，偏置电路可配置为调整偏置电路Gm以减轻宽范围电路的影响 特定的特性和电路可以使用的操作环境的变化范围，例如温度变化。

公开(公告)号：US06829131B1

公开(公告)日：2004-12-07

申请号：US09395073

申请日：1999-09-13

Applicant: Wayne A. Loeb ,  John J. Neumann, Jr. ,  Kaigham J. Gabriel

Inventor： Wayne A. Loeb ,  John J. Neumann, Jr. ,  Kaigham J. Gabriel

IPC: H02H2300

CPC classification number: H04R19/005 ,  H04R17/00

Abstract: An acoustic transducer comprising a substrate; and a diaphragm formed by depositing a micromachined membrane onto the substrate. The diaphragm is formed as a single silicon chip using a CMOS MEMS (microelectromechanical systems) semiconductor fabrication process. The curling of the diaphragm during fabrication is reduced by depositing the micromachined membrane for the diaphragm in a serpentine-spring configuration with alternating longer and shorter arms. As a microspeaker, the acoustic transducer of the present invention converts a digital audio input signal directly into a sound wave, resulting in a very high quality sound reproduction at a lower cost of production in comparison to conventional acoustic transducers. The micromachined diaphragm may also be used in microphone applications.

Abstract translation: 包括基底的声学换能器; 以及通过将微加工膜沉积到基底上而形成的隔膜。 使用CMOS MEMS（微机电系统）半导体制造工艺将隔膜形成为单个硅芯片。 在制造期间，通过将用于隔膜的微加工膜沉积成具有交替的较长和较短臂的蛇形弹簧构型来减小隔膜的卷曲。 作为微型扬声器，与传统的声换能器相比，本发明的声换能器将数字音频输入信号直接转换成声波，从而以较低的生产成本产生非常高质量的声音再现。 微加工膜片也可用于麦克风应用。

公开(公告)号：US20110116208A1

公开(公告)日：2011-05-19

申请号：US12943234

申请日：2010-11-10

Applicant: David M. Signoff ,  Wayne A. Loeb

Inventor： David M. Signoff ,  Wayne A. Loeb

IPC: H01G4/002

CPC classification number: H01G4/228 ,  H01G4/002

Abstract: In one embodiment, an apparatus includes a first reference voltage coupled to a first metal layer and a second reference voltage coupled to a second metal layer. A first finger type in the plurality of fingers is coupled to the first metal layer at a first area and coupled to the first metal layer and the second metal layer at a second area. A second finger type in the plurality of fingers is coupled to the second metal layer at the first area and coupled to the first metal layer and the second metal layer at the second area. Also, the first finger type and the second finger type alternately positioned next to each other.

Abstract translation: 在一个实施例中，装置包括耦合到第一金属层的第一参考电压和耦合到第二金属层的第二参考电压。 多个指状物中的第一手指类型在第一区域处耦合到第一金属层，并且在第二区域处耦合到第一金属层和第二金属层。 多个指状物中的第二手指类型在第一区域处耦合到第二金属层，并且在第二区域处耦合到第一金属层和第二金属层。 此外，第一手指型和第二手指型彼此交替地定位。

公开(公告)号：US07864498B1

公开(公告)日：2011-01-04

申请号：US12560397

申请日：2009-09-15

Applicant: Wayne A. Loeb ,  Alireza Shirvani-Mahdavi

Inventor： Wayne A. Loeb ,  Alireza Shirvani-Mahdavi

IPC: H02H9/04 ,  H02H3/22

CPC classification number: H03F1/52 ,  H02H9/025 ,  H03F3/191 ,  H03F2200/231 ,  H03F2200/27 ,  H03F2200/435

Abstract: A circuit includes: an input of shunt circuitry to couple with an output of detection circuitry that provides a protection signal; an output of the shunt circuitry to couple with an input of power amplification circuitry; and the shunt circuitry configured to reduce a gain of the power amplification circuitry responsive to the protection signal, the shunt circuitry including a delay stage configured to continue shunting of an input signal of the power amplification circuitry for a time period corresponding to a turn on time of the power amplification circuitry. In addition, a method includes: receiving a protection signal from detection circuitry; responsive to the protection signal, shunting an input signal of power amplification circuitry to reduce a gain of the power amplification circuitry; and continuing the shunting for a time period corresponding to a turn on time of the power amplification circuitry.

Abstract translation: 电路包括：分流电路的输入端，与提供保护信号的检测电路的输出耦合; 分流电路的输出端与功率放大电路的输入耦合; 并且所述分流电路经配置以响应于所述保护信号而减小所述功率放大电路的增益，所述并联电路包括延迟级，所述延迟级配置成在对应于导通时间的时间段内继续对所述功率放大电路的输入信号进行分流 的功率放大电路。 另外，一种方法包括：从检测电路接收保护信号; 响应于保护信号，分流功率放大电路的输入信号以减小功率放大电路的增益; 并且在与功率放大电路的导通时间对应的时间段内继续分流。

公开(公告)号：US07863976B1

公开(公告)日：2011-01-04

申请号：US12212598

申请日：2008-09-17

Applicant: Wayne A. Loeb ,  King Chun Tsai

Inventor： Wayne A. Loeb ,  King Chun Tsai

IPC: H03F1/14

CPC classification number: H03G1/0088 ,  H03F1/0261 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/245 ,  H03F3/45085 ,  H03F3/602 ,  H03F2200/09 ,  H03F2200/18 ,  H03F2200/423 ,  H03F2200/451 ,  H03F2200/541 ,  H03F2203/21139 ,  H03F2203/21178 ,  H03F2203/45731 ,  H04B1/0483

Abstract: An adjustable stage in an amplifier. The adjustable stage generally comprises a first common node, a second common node and a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at the second common node, a transistor and an inductor to resonate with a capacitance at a base of the transistor. The present invention advantageously provides a relatively compact power amplifier with an extended output power range at which the amplifier is highly efficient. In preferred embodiments, the input and output matching characteristics are generally independent of the number of selected output amplifier segments.

Abstract translation: 放大器中的可调节级。 可调节级通常包括第一公共节点，第二公共节点和多个可独立选择的并行放大器段。 每个并行段可以具有在第一公共节点处的输入和第二公共节点处的输出，晶体管和电感器，以与晶体管的基极处的电容谐振。 本发明有利地提供了一种具有扩展输出功率范围的相对紧凑的功率放大器，在该功率范围内放大器是高效率的。 在优选实施例中，输入和输出匹配特性通常与选择的输出放大器段的数量无关。

公开(公告)号：US07761067B1

公开(公告)日：2010-07-20

申请号：US10830117

申请日：2004-04-21

Applicant: King Chun Tsai ,  Sang Won Son ,  Wayne A. Loeb

Inventor： King Chun Tsai ,  Sang Won Son ,  Wayne A. Loeb

IPC: H01Q11/12 ,  H04B1/04

CPC classification number: H04B1/30 ,  H03H7/12 ,  H03H2007/013 ,  H03H2210/012 ,  H03H2210/015 ,  H03J2200/10 ,  H04B1/0475 ,  H04B1/1638

Abstract: Apparatus, systems, and methods implementing techniques for calibrating a filter circuit. A comparator generates an output based on a filter output amplitude signal and a reference amplitude signal. A calibration logic unit receives the comparator output and produces a component code that is used by the filter circuit to adjust one or more component values.

Abstract translation: 用于校准滤波电路的技术的装置，系统和方法。 比较器基于滤波器输出幅度信号和参考幅度信号产生输出。 校准逻辑单元接收比较器输出并产生由滤波器电路用于调整一个或多个分量值的分量代码。