公开(公告)号：US20240211291A1

公开(公告)日：2024-06-27

申请号：US18088962

申请日：2022-12-27

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Yuping Shen ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng

IPC: G06F9/455 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/5077 ,  G06F2009/4557

Abstract: A host processing system assigns unequal time slices at a parallel processor to virtual functions based on profiles of applications executing at the virtual functions and an available budget of the parallel processor. The host processing system calculates a world switch cycle interval and assesses an available processing budget of the parallel processor. The available budget indicates the amount of graphics processing time the parallel processor has not yet allocated to virtual functions for each world switch cycle interval.

公开(公告)号：US20240201876A1

公开(公告)日：2024-06-20

申请号：US18083306

申请日：2022-12-16

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Lu Lu ,  Anthony Asaro ,  Yinan Jiang

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0644 ,  G06F3/0673

Abstract: A method and apparatus of managing memory includes storing a first memory page at a shared memory location in response to the first memory page including data shared between a first virtual machine and a second virtual machine. A second memory page is stored at a memory location unique to the first virtual machine in response to the second memory page including data unique to the first virtual machine. The first memory page is accessed by the first virtual machine and the second virtual machine, and the second memory page is accessed by the first virtual machine and not the second virtual machine.

公开(公告)号：US11182186B2

公开(公告)日：2021-11-23

申请号：US15663499

申请日：2017-07-28

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Anthony Asaro ,  Yinan Jiang ,  Andy Sung ,  Ahmed M. Abdelkhalek ,  Xiaowei Wang ,  Sidney D. Fortes

IPC: G06F9/46 ,  G06F9/455 ,  G06F9/48

Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.

公开(公告)号：US20190018699A1

公开(公告)日：2019-01-17

申请号：US15663499

申请日：2017-07-28

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Anthony Asaro ,  Yinan Jiang ,  Andy Sung ,  Ahmed M. Abdelkhalek ,  Xiaowei Wang ,  Sidney D. Fortes

IPC: G06F9/455 ,  G06F9/48

Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.

公开(公告)号：US20240211309A1

公开(公告)日：2024-06-27

申请号：US18085902

申请日：2022-12-21

Applicant: ATI TECHNOLOGIES ULC ,  ADVANCED MICRO DEVICES, INC.

Inventor： Ahmed M. Abdelkhalek ,  Rutao Zhang ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng ,  Yuping Shen ,  Mikhail Mironov

IPC: G06F9/48 ,  G06F9/455

CPC classification number: G06F9/4887 ,  G06F9/45558 ,  G06F2009/4557

Abstract: A parallel processor is configured to enforce job limits for virtual functions to facilitate an expected quality of service for each of the virtual functions assigned to a virtual machine executing at the processing unit. A scheduler schedules well-behaving virtual functions prior to badly-behaving virtual functions to prevent badly-behaving virtual functions from consuming a disproportionate share of hardware resources, thereby mitigating an impact of the badly-behaving virtual functions on the quality of service of the well-behaving virtual functions.

公开(公告)号：US20240211290A1

公开(公告)日：2024-06-27

申请号：US18088955

申请日：2022-12-27

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Yuping Shen ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F9/45545 ,  G06F2009/45579

Abstract: A processing system aligns rendering timing of an application executing at a guest virtual function to world switch timing of a host virtual machine. The host virtual machine sets a world switch interval based on a number of virtual functions (VFs) that share the parallel processor and a target maximum frame rate. The processing system delays submission of jobs for a VF to the parallel processor by an offset with respect to the world switch timing to ensure that the application starts generating a job for the parallel processor before the VF gains a time slice so the job will be ready for the parallel processor when the VF gains the time slice.

公开(公告)号：US20250103371A1

公开(公告)日：2025-03-27

申请号：US18472924

申请日：2023-09-22

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： JinYun Liu ,  Yinan Jiang ,  HaiJun Chang

IPC: G06F9/455

Abstract: The disclosed computing device can include host circuitry configured to provide a physical function and guest circuitry configured to provide a virtual function. The host circuitry is configured to dynamically assign request identifiers for accessing at least the host circuitry in a manner that allows the request identifiers to change on a command-to-command basis instead of a time-to-time basis that uses fixed value request identifiers in time slices. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US20240202015A1

公开(公告)日：2024-06-20

申请号：US18066155

申请日：2022-12-14

Applicant: Advanced Micro Devices, Inc ,  ATI Technologies ULC

Inventor： Lu Lu ,  Anthony Asaro ,  Gia Tung Phan ,  Gongxian Cheng ,  Philip Ng ,  Yinan Jiang ,  Felix Kuehling

IPC: G06F9/455 ,  G06F9/54

CPC classification number: G06F9/45545 ,  G06F9/45558 ,  G06F9/545 ,  G06F2009/4557 ,  G06F2009/45579

Abstract: In a computing device, a hardware device (e.g., a parallel accelerated processor or graphics processing unit) is coupled to a bus, such as a peripheral component interconnect express (PCIe) bus. The hardware device supports physical partitioning that allows physical resources of the hardware device to be separated into different partitions. Examples of such physical resources include engine resources (e.g., compute resources, direct memory access resources), memory resources (e.g., random access memory), and so forth. Each physical partition is mapped to a physical function that is exposed to a host on the computing device in a manner that is compliant with the bus protocol, allowing software to access the physical partition in a conventional manner based on the bus protocol.

公开(公告)号：US20240100422A1

公开(公告)日：2024-03-28

申请号：US17955266

申请日：2022-09-28

Applicant: Advanced Micro Devices, Inc ,  ATI Technologies ULC

Inventor： Yinan Jiang ,  HaiJun Chang ,  GuoQing Zhang

IPC: A63F13/335 ,  A63F13/352 ,  A63F13/358

CPC classification number: A63F13/335 ,  A63F13/352 ,  A63F13/358

Abstract: Resource use orchestration for multiple application instances is described. In accordance with the described techniques, a time interval for accessing a resource is divided into multiple time slots. In one or more implementations, the resource is a graphics processing unit. Each of a plurality of containers associated with an application is assigned to one of the multiple time slots according to a disbursement algorithm. A respective signal offset is provided to each container based on an assigned time slot of the container. The provided signal offsets cause the plurality of containers to access the resource for the application in a predetermined order.

公开(公告)号：US12293092B2

公开(公告)日：2025-05-06

申请号：US18083306

申请日：2022-12-16

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Lu Lu ,  Anthony Asaro ,  Yinan Jiang

IPC: G06F3/06

Abstract: A method and apparatus of managing memory includes storing a first memory page at a shared memory location in response to the first memory page including data shared between a first virtual machine and a second virtual machine. A second memory page is stored at a memory location unique to the first virtual machine in response to the second memory page including data unique to the first virtual machine. The first memory page is accessed by the first virtual machine and the second virtual machine, and the second memory page is accessed by the first virtual machine and not the second virtual machine.