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    HOST CONTROLLER AND BUS-ATTACHED PERIPHERAL DEVICE POWER CONSUMPTION REDUCTION
    1.
    发明公开
    HOST CONTROLLER AND BUS-ATTACHED PERIPHERAL DEVICE POWER CONSUMPTION REDUCTION 审中-公开

    公开(公告)号：US20230273890A1

    公开(公告)日：2023-08-31

    申请号：US17682527

    申请日：2022-02-28

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Raul Gutierrez ,  Indrani Paul ,  Joseph Scanlon ,  Aniruddha Dasgupta ,  Madhusudan Chilakam

    IPC: G06F13/38 ,  G06F13/20

    CPC classification number: G06F13/385 ,  G06F13/20 ,  G06F2213/0042

    Abstract: Systems, apparatuses, and methods for a host controller inferring idleness based on activity generated by a bus-attached peripheral device are disclosed. A host controller detects activity by a first device attached to the host controller via a first bus. The host controller generates an activity vector based on the detected activity, and the host controller determines whether the activity vector indicates that the first device is only engaging in handshaking or control activity rather than data transfer. If the first device is merely communicating status information, then the host controller infers idleness and conveys an idleness indicator to a power manager. The power manager turns off power to system memory and/or other components based on the idleness indicator, but keeps enough power on to allow the host controller to communicate with the first device for handshaking or status purposes.

    PEAK POWER PACKAGE TRACKING
    3.
    发明公开
    PEAK POWER PACKAGE TRACKING 审中-公开

    公开(公告)号：US20240142515A1

    公开(公告)日：2024-05-02

    申请号：US18050742

    申请日：2022-10-28

    Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

    Inventor： Amanullah Samit ,  Raman Madras Srinivasan ,  Aniruddha Dasgupta

    IPC: G01R31/28

    CPC classification number: G01R31/2896 ,  G01R31/287 ,  G01R31/2879

    Abstract: An apparatus and method for efficiently managing power consumption of multiple partitions of an integrated circuit. A processing unit includes multiple partitions, each assigned to operation parameters of a respective power domain. Each of the partitions is assigned to operating parameters of a respective power domain. A power manager accesses a total power consumption budget for the multiple partitions and sends corresponding assigned power limits to the multiple partitions. A particular partition calculates a corresponding measurement of power consumption as a weighted sum of sampled signals, and performs steps to reduce power consumption when the particular partition determines the corresponding measurement of power consumption exceeds a corresponding assigned power limit. The power manager updates the assigned power limits within a first time interval. The multiple partitions calculate the power consumption measurements and perform power reduction steps within a second time interval less than the first time interval.

    EARLY CACHE PREFETCHING IN PREPARATION FOR EXIT FROM IDLE MODE
    5.
    发明申请
    EARLY CACHE PREFETCHING IN PREPARATION FOR EXIT FROM IDLE MODE 有权
    早期高速缓存在空闲模式下的准备

    公开(公告)号：US20160321183A1

    公开(公告)日：2016-11-03

    申请号：US14701778

    申请日：2015-05-01

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Madhu Saravana Sibi Govindan ,  William Lloyd Bircher ,  Aniruddha Dasgupta ,  Dongyuan Zhan

    IPC: G06F12/08 ,  G06F1/32

    CPC classification number: G06F12/0862 ,  G06F1/3296 ,  G06F12/0875 ,  G06F2212/1024 ,  G06F2212/1028 ,  G06F2212/6024 ,  Y02D10/13

    Abstract: A system includes a functional unit, at least one cache coupled to the functional unit, and a power management unit coupled to the functional unit and the at least one cache, the power management unit configured to trigger the functional unit to initiate prefetching of data to repopulate the at least one cache prior to a predicted exit of the functional unit from an idle mode to an active mode. The system further may include a prediction unit to predict the exit from the idle mode for the functional unit as occurring a predetermined duration from an entry into the idle mode. The prediction unit may determine the predetermined duration based on a history of idle mode durations indicative of durations of previous instances in which the functional unit was in the idle mode.

    Abstract translation: 一种系统包括功能单元，耦合到功能单元的至少一个高速缓存器，以及耦合到功能单元和至少一个高速缓存器的功率管理单元，该功率管理单元被配置为触发功能单元启动数据预取 在功能单元从空闲模式到活动模式的预测退出之前重新填充至少一个高速缓存。 该系统还可以包括预测单元，用于预测从功能单元的空闲模式退出为从进入空闲模式的预定持续时间。 预测单元可以基于指示其中功能单元处于空闲模式的先前实例的持续时间的空闲模式持续时间的历史来确定预定持续时间。

    SYSTEM AND METHOD FOR ADJUSTING PERFORMANCE BASED ON THERMAL CONDITIONS WITHIN A PROCESSOR
    6.
    发明申请
    SYSTEM AND METHOD FOR ADJUSTING PERFORMANCE BASED ON THERMAL CONDITIONS WITHIN A PROCESSOR 有权
    基于处理器中的热条件调节性能的系统和方法

    公开(公告)号：US20150346798A1

    公开(公告)日：2015-12-03

    申请号：US14293520

    申请日：2014-06-02

    Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

    Inventor： Praveen K. Dongara ,  Aniruddha Dasgupta ,  Adam Clark

    IPC: G06F1/32 ,  G06F1/20

    CPC classification number: G06F1/3206 ,  G06F1/206 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/16 ,  Y02D10/172

    Abstract: A system and method for efficient management of operating modes within an integrated circuit (IC) for optimal power and performance targets. A semiconductor chip includes processing units each of which operates with respective operating parameters. Temperature sensors are included to measure a temperature of the one or more processing units during operation. A power manager determines a calculated power value independent of thermal conditions and current draw. The power manager reads each of a first thermal design power (TDP) value for the processing units and a second TDP value for a platform housing the semiconductor chip. The power manager determines a ratio of the first TDP value to the second TDP value. Additionally, the power manager determines another ratio of the first TDP value to the calculated power value. Using the measured temperature, the ratios and the calculated power value, the power manager determines a manner to adjust the operating parameters.

    Abstract translation: 一种用于在集成电路（IC）内高效管理工作模式以实现最佳功率和性能目标的系统和方法。 半导体芯片包括处理单元，每个处理单元以各自的操作参数进行操作。 包括温度传感器以测量操作期间一个或多个处理单元的温度。 功率管理器确定独立于热条件和电流消耗的计算功率值。 功率管理器读取处理单元的第一热设计功率（TDP）值和用于容纳半导体芯片的平台的第二TDP值。 电源管理器确定第一TDP值与第二TDP值的比率。 此外，功率管理器确定第一TDP值与计算的功率值的另一比率。 使用测量的温度，比率和计算的功率值，功率管理器确定调整操作参数的方式。

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