公开(公告)号：US20250062174A1

公开(公告)日：2025-02-20

申请号：US18938243

申请日：2024-11-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

公开(公告)号：US20210159188A1

公开(公告)日：2021-05-27

申请号：US16693191

申请日：2019-11-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Yung-I YEH

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56

Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device, a protection material and a reinforcement structure. The first electronic device and the second electronic device are electrically connected to the wiring structure. The protection material is disposed between the first electronic device and the wiring structure and between the second electronic device and the wiring structure. The reinforcement structure is disposed on and contacts the first electronic device and the second electronic device. The reinforcement structure contacts the protection material.

公开(公告)号：US20210134692A1

公开(公告)日：2021-05-06

申请号：US16671988

申请日：2019-11-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chien-Ching CHEN ,  Chen Yuan WENG

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/29 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

公开(公告)号：US20220059406A1

公开(公告)日：2022-02-24

申请号：US17000232

申请日：2020-08-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L21/78 ,  H01L21/50 ,  H01L21/66 ,  H01L23/00

Abstract: The present disclosure provides a method for manufacturing a semiconductor package. The method includes disposing a first semiconductor substrate on a temporary carrier and dicing the first semiconductor substrate to form a plurality of dies. Each of the plurality of dies has an active surface and a backside surface opposite to the active surface. The backside surface is in contact with the temporary carrier and the active surface faces downward. The method also includes transferring one of the plurality of dies from the temporary carrier to a temporary holder. The temporary holder only contacts a periphery portion of the active surface of the one of the plurality of dies.

公开(公告)号：US20210327819A1

公开(公告)日：2021-10-21

申请号：US16852259

申请日：2020-04-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG

IPC: H01L23/544 ,  H01L21/56 ,  H01L23/31 ,  H01L23/18 ,  H01L27/148 ,  H01L23/00

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.

公开(公告)号：US20200212005A1

公开(公告)日：2020-07-02

申请号：US16232935

申请日：2018-12-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Jen-Hsien WONG

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package device includes a circuit layer, a first set of stacked components, a first conductive wire, a space and an electronic component. The first set of stacked components is disposed on the circuit layer. The first conductive wire electrically connects the first set of stacked components. The space is defined between the first set of stacked components and the circuit layer. The space accommodates the first conductive wire. The electronic component is disposed in the space.

公开(公告)号：US20200027804A1

公开(公告)日：2020-01-23

申请号：US16040240

申请日：2018-07-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chien-Ching CHEN

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.

公开(公告)号：US20180061815A1

公开(公告)日：2018-03-01

申请号：US15680063

申请日：2017-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG ,  Chun-Jun ZHUANG

IPC: H01L25/16 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L25/16 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/04 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/02311 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package device comprises a circuit layer, an electronic component disposed on the circuit layer, a package element and a first encapsulant. The package element is disposed on the circuit layer. The package element includes at least two electrical contacts electrically connected to the circuit layer. The first encapsulant is disposed on the circuit layer. The first encapsulant encapsulates the electronic component and the package element and exposes the electrical contacts of the package element.

公开(公告)号：US20250132278A1

公开(公告)日：2025-04-24

申请号：US18491720

申请日：2023-10-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Jing HSU ,  Hsu-Nan FANG

IPC: H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/18

Abstract: An electronic device is disclosed. The electronic device includes a unit chip. The unit chip includes an electronic component having a power delivery circuit and a reinforcement supporting the electronic component. The reinforcement is configured to transmit a power signal to the power delivery circuit. The reinforcement includes a thermosetting reinforcement or a glass reinforcement.

公开(公告)号：US20220199559A1

公开(公告)日：2022-06-23

申请号：US17127671

申请日：2020-12-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan FANG

IPC: H01L23/00 ,  H01L21/68

Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.