公开(公告)号：US12125776B2

公开(公告)日：2024-10-22

申请号：US17562936

申请日：2021-12-27

申请人： Yibu Semiconductor Co., Ltd.

发明人： Weiping Li

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L23/14 ,  H01L23/15

CPC分类号： H01L23/49833 ,  H01L21/486 ,  H01L23/5381 ,  H01L24/11 ,  H01L24/14 ,  H01L25/0655 ,  H01L25/50 ,  H01L23/147 ,  H01L23/15 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/80 ,  H01L2224/0603 ,  H01L2224/11462 ,  H01L2224/11912 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/80895 ,  H01L2224/80896

摘要： The present disclosure provides a method for forming a semiconductor package and the semiconductor package. The method comprises attaching an interconnect device to a semiconductor substrate, and flip-chip mounting at least two chips over the interconnect device and the semiconductor substrate. Each chip includes at least one first bump of a first height and at least one second bump of a second height formed on a front surface hereof, the second height being greater than the first height. The method further comprises bonding the at least one second conductive bump of each of the at least two chips to the upper surface of the semiconductor substrate and bonding the first conductive bump of each of the at least two chips to the upper surface of the interconnect device Thus, the method uses a relatively simple and low cost packaging process to achieve high-density interconnection wiring in a package.

公开(公告)号：US11999001B2

公开(公告)日：2024-06-04

申请号：US17545322

申请日：2021-12-08

申请人： Adeia Semiconductor Technologies LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H05K1/11 ,  B23K20/00 ,  B23K20/02 ,  H01L21/50 ,  H01L23/00 ,  H01L23/10 ,  H01L23/48 ,  H01L23/49 ,  H01L23/498 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K13/04 ,  H01L21/48 ,  H01L21/768

CPC分类号： B23K20/023 ,  B23K20/002 ,  H01L21/50 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H05K1/11 ,  H05K1/14 ,  H05K1/144 ,  H05K1/18 ,  H05K3/0094 ,  H05K3/34 ,  H05K13/046 ,  H05K13/0465 ,  H01L21/4853 ,  H01L21/76898 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/27 ,  H01L2224/02372 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05138 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13138 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1319 ,  H01L2224/14131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16501 ,  H01L2224/16503 ,  H01L2224/16505 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29138 ,  H01L2224/29147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81075 ,  H01L2224/8112 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/83075 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/381 ,  H05K1/111 ,  H05K2201/04 ,  H05K2203/04 ,  H01L2224/8112 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04953 ,  H01L2224/0518 ,  H01L2924/01071 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05181 ,  H01L2924/00014 ,  H01L2224/05171 ,  H01L2924/01042 ,  H01L2224/05138 ,  H01L2924/01015 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04941 ,  H01L2224/05155 ,  H01L2924/01015 ,  H01L2224/05157 ,  H01L2924/01015 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05155 ,  H01L2924/01074 ,  H01L2224/13105 ,  H01L2924/01047 ,  H01L2224/13109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/13138 ,  H01L2924/01034 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/1145 ,  H01L2924/00014 ,  H01L2224/11452 ,  H01L2924/00014 ,  H01L2224/16501 ,  H01L2924/00012 ,  H01L2224/16505 ,  H01L2924/00012 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2224/05026 ,  H01L2924/00012 ,  H01L2224/05571 ,  H01L2924/00012 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13184 ,  H01L2924/00014 ,  H01L2224/73103 ,  H01L2924/00012 ,  H01L2224/73203 ,  H01L2924/00012 ,  H01L2224/27462 ,  H01L2924/00014 ,  H01L2224/27464 ,  H01L2924/00014 ,  H01L2224/2745 ,  H01L2924/00014 ,  H01L2224/27452 ,  H01L2924/00014 ,  H01L2224/29105 ,  H01L2924/01047 ,  H01L2224/29109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/29138 ,  H01L2924/01034 ,  H01L2224/32501 ,  H01L2924/00012 ,  H01L2224/32505 ,  H01L2924/00012 ,  H01L2224/8312 ,  H01L2924/00014 ,  H01L2224/1319 ,  H01L2924/07025 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2224/13018 ,  H01L2924/00012

摘要： A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

公开(公告)号：US11682645B2

公开(公告)日：2023-06-20

申请号：US17458551

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jung-Hua Chang ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/11464 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16013 ,  H01L2224/16227 ,  H01L2924/181

摘要： A semiconductor structure including an integrated circuit die and conductive bumps is provided. The integrated circuit die includes bump pads. The conductive bumps are disposed on the bump pads. Each of the conductive bumps includes a first pillar portion disposed on one of the bump pads and a second pillar portion disposed on the first pillar portion. The second pillar portion is electrically connected to one of the bump pads through the first pillar portion, wherein a first width of the first pillar portion is greater than a second width of the second pillar portion. A package structure including the above-mentioned semiconductor structure is also provided.

公开(公告)号：US20190237434A1

公开(公告)日：2019-08-01

申请号：US16377558

申请日：2019-04-08

申请人： Micron Technology, Inc.

发明人： Jaspreet S. Gandhi

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05582 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13541 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/13611 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16503 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/8181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/3512 ,  H01L2924/00014

摘要： Interconnect structures with intermetallic palladium joints are disclosed herein. In one embodiment, an interconnect structure includes a first conductive element, a second conductive element, and an intermetallic palladium joint. The intermetallic palladium joint includes an intermetallic crystallite spanning between the first and second conductive elements. The intermetallic crystallite includes a first end portion and a second end portion. The first end portion directly contacts the first conductive element. The second end portion directly contacts the second conductive element.

公开(公告)号：US20180358316A1

公开(公告)日：2018-12-13

申请号：US16105014

申请日：2018-08-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tin-Hao Kuo ,  Chen-Shien Chen ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Sheng-Yu Wu ,  Yao-Chun Chuang

IPC分类号： H01L23/00 ,  H01L23/498

CPC分类号： H01L24/13 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11903 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A pillar structure, and a method of forming, for a substrate is provided. The pillar structure may have one or more tiers, where each tier may have a conical shape or a spherical shape. In an embodiment, the pillar structure is used in a bump-on-trace (BOT) configuration. The pillar structures may have circular shape or an elongated shape in a plan view. The substrate may be coupled to another substrate. In an embodiment, the another substrate may have raised conductive traces onto which the pillar structure may be coupled.

公开(公告)号：US20180286795A1

公开(公告)日：2018-10-04

申请号：US15472184

申请日：2017-03-28

申请人： Micron Technology, Inc.

发明人： Toshiyuki Maenosono ,  Yuta Kikuchi ,  Manabu Ito ,  Yoshihiro Saeki

IPC分类号： H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L21/768 ,  H01L21/311

CPC分类号： H01L23/49827 ,  H01L21/76804 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2224/11002 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/1161 ,  H01L2224/11616 ,  H01L2224/11622 ,  H01L2224/1181 ,  H01L2224/13007 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/81193 ,  H01L2924/01047 ,  H01L2924/013 ,  H01L2924/00014

摘要： Apparatuses and methods using a silicon on insulator (SOI) substrate are described. An example apparatus includes: a substrate including a first surface and a second surface opposite to the first surface; a circuit formed in the first surface; a first electrode through the substrate from the first surface to the second surface; and a first insulative film around the first electrode. The first electrode includes: a first portion formed in the substrate; and a second portion continuous to the first portion and protruding from the second surface. The first insulative film is formed between the first portion of the first electrode in the substrate and extending to a side surface of the second portion of the first electrode.

公开(公告)号：US10062657B2

公开(公告)日：2018-08-28

申请号：US15518219

申请日：2015-10-09

申请人： ISHIHARA CHEMICAL CO., LTD.

发明人： Shoya Iuchi ,  Masaru Hatabe

IPC分类号： H01L23/00 ,  H05K3/34

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13139 ,  H05K3/34 ,  H01L2924/014 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01047

摘要： In order to manufacture an alloy bump, a resist pattern having openings which expose a substrate is formed on the substrate, an under-bump metal is formed on the substrate inside the openings, a first plating film is formed on the under-bump metal by electroplating, a second plating film containing no metal components which are contained in the first plating film is formed on the first plating film by electroplating, the resist pattern is removed, and the alloy bump is formed by heat treating the substrate to thereby alloy the first plating film and the second plating film.

公开(公告)号：US20180233475A1

公开(公告)日：2018-08-16

申请号：US15954420

申请日：2018-04-16

申请人： MURATA MANUFACTURING CO., LTD.

发明人： Yasunari UMEMOTO ,  Daisuke TOKUDA ,  Tsunekazu SAIMEI ,  Hiroaki TOKUYA

IPC分类号： H01L23/00 ,  H01L29/08 ,  H01L29/737 ,  H01L29/66 ,  H01L29/20 ,  H01L29/732 ,  H01L29/205 ,  H01L29/417

CPC分类号： H01L24/13 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L29/0692 ,  H01L29/0817 ,  H01L29/20 ,  H01L29/205 ,  H01L29/41708 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/6631 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371 ,  H01L29/7375 ,  H01L29/7378 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1134 ,  H01L2224/13013 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13563 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/10337 ,  H01L2924/10338 ,  H01L2924/13051 ,  H01L2924/13055 ,  H01L2924/1423 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/014

摘要： A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.

公开(公告)号：US10037962B2

公开(公告)日：2018-07-31

申请号：US15584498

申请日：2017-05-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Jie Chen

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L23/13 ,  H05K1/11 ,  H05K3/34

CPC分类号： H01L24/17 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/04 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/05559 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16238 ,  H01L2224/1705 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/014 ,  H01L2224/05552

摘要： A package includes a first package component, a second package component over the first package component, and a solder region bonding the first package component to the second package component. At least one ball-height control stud separates the first package component and the second package component from each other, and defines a standoff distance between the first package component and the second package component.

公开(公告)号：US20180182724A1

公开(公告)日：2018-06-28

申请号：US15904812

申请日：2018-02-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chita CHUANG ,  Yao-Chun CHUNAG ,  Tsung-Shu LIN ,  Chen-Cheng KUO ,  Chen-Shien CHEN

IPC分类号： H01L23/00 ,  H01L23/31

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/381 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01078 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/01082 ,  H01L2924/01046 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/00

摘要： A packaging assembly includes a semiconductor device. The semiconductor device includes a conductive pad having a first width, and an under-bump metallization (UBM) layer on the conductive pad, wherein the UBM layer has a second width greater than the first width. The semiconductor device further includes a conductive pillar on the UBM layer, and a cap layer over the conductive pillar, wherein the cap layer exposes sidewalls of the UBM layer. The packaging assembly further includes a substrate. The substrate includes a conductive region, and a mask layer overlying the substrate and exposing a portion of the conductive region. The packaging assembly further includes a joint solder structure between the conductive pillar and the conductive region.