公开(公告)号：US11594506B2

公开(公告)日：2023-02-28

申请号：US17030181

申请日：2020-09-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pei-Jen Lo ,  Shun-Tsat Tu ,  Cheng-En Weng

IPC: H01L23/00

Abstract: A semiconductor package is provided. The semiconductor package includes a first conductive layer, a plurality of first conductive pads, a plurality of second conductive pads, and a first dielectric layer. The first conductive pads are electrically connected to the first conductive layer. The second conductive pads are electrically disconnected from the first conductive layer.

公开(公告)号：US11538756B2

公开(公告)日：2022-12-27

申请号：US17023260

申请日：2020-09-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shun-Tsat Tu ,  Pei-Jen Lo ,  Chien-Han Chiu

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/00 ,  H01L23/495

Abstract: A bonding structure is provided. The bonding structure includes a conductive layer, a seed layer, and a nanotwinned copper (NT-Cu) layer. The seed layer is disposed on the conductive layer. The NT-Cu layer is disposed on the seed layer. The NT-Cu layer has anisotropic crystal structure.

公开(公告)号：US11715716B2

公开(公告)日：2023-08-01

申请号：US17378513

申请日：2021-07-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pei-Jen Lo

IPC: H01L23/498 ,  H01L25/18 ,  H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/18 ,  H01L2224/13019 ,  H01L2224/1403 ,  H01L2224/16227 ,  H01L2224/81345 ,  H01L2224/81815

Abstract: An electronic device, a package structure and an electronic manufacturing method are provided. The electronic device includes a substrate, a first bump, a second bump and a first reflowable material. The first bump is disposed over the substrate, and has a first width. An end portion of the first bump defines a first recess portion. The second bump is disposed over the substrate, and has a second width less than the first width. The first reflowable material is disposed on the first bump and extends in the first recess portion.

公开(公告)号：US11978706B2

公开(公告)日：2024-05-07

申请号：US17460051

申请日：2021-08-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shun-Tsat Tu ,  Pei-Jen Lo

IPC: H01L23/544 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L24/03 ,  H01L24/06 ,  H01L24/08 ,  H01L24/20 ,  H01L24/80 ,  H01L2223/54426 ,  H01L2224/0213 ,  H01L2224/0362 ,  H01L2224/06515 ,  H01L2224/08225 ,  H01L2224/80031 ,  H01L2224/80047

Abstract: An electronic package structure, an electronic substrate, and a method of manufacturing an electronic package structure are provided. The electronic package structure includes a substrate. The substrate includes a bonding region and an alignment structure. The bonding region is located at a side of the substrate and configured to bond with an electronic component. The alignment structure is located at the side of the substrate and out of the bonding region and configured to providing a fiducial mark for position-aligning, wherein the alignment structure comprises a first region and a second region visually distinct from the first region.

公开(公告)号：US11120988B2

公开(公告)日：2021-09-14

申请号：US16529572

申请日：2019-08-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pei-Jen Lo ,  Cheng-Lung She

IPC: H01L23/58 ,  H01L21/02

Abstract: A semiconductor device package includes a first semiconductor device, a first redistribution layer (RDL) structure and a second RDL structure. The first semiconductor device has a first conductive terminal and a second conductive terminal. The first RDL structure covers the first conductive terminal. The second RDL structure covers the second conductive terminal and being separated from the first RDL structure.

公开(公告)号：US11031382B2

公开(公告)日：2021-06-08

申请号：US16151310

申请日：2018-10-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pei-Jen Lo ,  Chien-Han Chiu ,  Wen Hung Huang

IPC: H01L27/01 ,  H01L23/00 ,  H01L49/02

Abstract: An electronic device includes: a first insulation layer and a first conductive pillar. The first insulation layer has a first surface and a second surface opposite to the first surface, and the first conductive pillar comprises a first portion and a second portion. The first portion of the first conductive pillar is surrounded by the first insulation layer. The second portion of the first conductive pillar is disposed on the first surface of the first insulation layer. A height of the second portion of the first conductive pillar is equal to or greater than 10% of a height of the first portion of the conductive pillar.

公开(公告)号：US11011491B2

公开(公告)日：2021-05-18

申请号：US16563701

申请日：2019-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shun-Tsat Tu ,  Pei-Jen Lo ,  Fong Ren Sie ,  Cheng-En Weng ,  Min Lung Huang

IPC: H01L23/00

Abstract: A semiconductor device package includes a connection structure having a first portion and a second portion extending from the first portion, the second portion having a width less than the first portion; and a dielectric layer surrounding the connection structure, wherein the dielectric layer and the second portion of the connection structure defines a space.