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    ELECTRICAL DEVICE
    3.
    发明申请
    ELECTRICAL DEVICE 审中-公开

    公开(公告)号：US20190057809A1

    公开(公告)日：2019-02-21

    申请号：US15680059

    申请日：2017-08-17

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Cheng-Yuan KUNG ,  Hung-Yi LIN ,  Teck-Chong LEE ,  Sheng-Chi HSIEH ,  Chien-Hua CHEN

    IPC: H01F27/40 ,  H01F21/12 ,  H01F27/28 ,  H01F27/29 ,  H03H7/38 ,  H01L25/16

    Abstract: An electrical device comprises a substrate, a first dielectric layer, a first die, an adjustable inductor and a second die. The substrate has a first surface. The first dielectric layer is disposed on the first surface of the substrate and has a first surface. The first die is surrounded by the first dielectric layer. The adjustable inductor is electrically connected to the first die. The adjustable inductor comprises a plurality of pillars surrounded by the first dielectric layer, a plurality of first metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars, and a plurality of second metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars. A width of at least one of the second metal strips is different than a width of at least one of the first metal strips. The second die is electrically connected to the adjustable inductor.

    SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件封装及其制造方法

    公开(公告)号：US20170047276A1

    公开(公告)日：2017-02-16

    申请号：US14825326

    申请日：2015-08-13

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Chien-Hua CHEN ,  Teck-Chong LEE ,  Chi-Han CHEN ,  Sheng-Chi HSIEH

    IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

    CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/11

    Abstract: The present disclosure relates to a semiconductor device package and a method for manufacturing the same. The semiconductor device package comprises a substrate, a first patterned conductive layer, an insulator layer, a second patterned conductive layer, and a dielectric layer. The first patterned conductive layer is disposed on a surface of the substrate. The insulator layer is disposed on the surface of the substrate and covers the first patterned conductive layer. The second patterned conductive layer is fully encapsulated by the insulator layer. The dielectric layer is disposed on the insulator layer.

    Abstract translation: 本公开涉及一种半导体器件封装及其制造方法。 半导体器件封装包括衬底，第一图案化导电层，绝缘体层，第二图案化导电层和电介质层。 第一图案化导电层设置在基板的表面上。 绝缘体层设置在衬底的表面上并覆盖第一图案化导电层。 第二图案化导电层被绝缘体层完全封装。 电介质层设置在绝缘体层上。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20170018550A1

    公开(公告)日：2017-01-19

    申请号：US14801730

    申请日：2015-07-16

    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

    Inventor： Hsu-Chiang SHIH ,  Sheng-Chi HSIEH ,  Chien-Hua CHEN ,  Teck-Chong LEE

    IPC: H01L27/08 ,  H01L23/48 ,  H01L49/02

    CPC classification number: H01L27/0805 ,  H01G4/30 ,  H01L23/481 ,  H01L27/101 ,  H01L28/60 ,  H01L2224/18

    Abstract: A semiconductor device and a method for manufacturing the same is described. The semiconductor device includes a substrate, a first capacitor and a second capacitor. The first capacitor includes a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer is disposed on the substrate. The first insulating layer is disposed on the first conductive layer and has a first peripheral edge. The second conductive layer is disposed on the first insulating layer and has a second peripheral edge. The second capacitor includes a third conductive layer, a second insulating layer and the second conductive layer. The second insulating layer is disposed on the second conductive layer and has a third peripheral edge. The third conductive layer is disposed on the second insulating layer and has a fourth peripheral edge. The first, second, third and fourth peripheral edges are aligned with one another.

    Abstract translation: 对半导体装置及其制造方法进行说明。 半导体器件包括衬底，第一电容器和第二电容器。 第一电容器包括第一导电层，第一绝缘层和第二导电层。 第一导电层设置在基板上。 第一绝缘层设置在第一导电层上并具有第一周边边缘。 第二导电层设置在第一绝缘层上并具有第二周边。 第二电容器包括第三导电层，第二绝缘层和第二导电层。 第二绝缘层设置在第二导电层上并具有第三外围边缘。 第三导电层设置在第二绝缘层上并具有第四周边。 第一，第二，第三和第四外围边缘彼此对准。

    SEMICONDUCTOR DEVICE PACKAGE
    8.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE 审中-公开

    公开(公告)号：US20190181082A1

    公开(公告)日：2019-06-13

    申请号：US16277962

    申请日：2019-02-15

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Chien-Hua CHEN ,  Sheng-Chi HSIEH ,  Cheng-Yuan KUNG

    IPC: H01L23/498 ,  H05K1/16 ,  H01L21/48 ,  H01L23/538

    CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H01L2224/11 ,  H05K1/162

    Abstract: A semiconductor device package includes: (1) a substrate having a first surface and a second surface opposite to the first surface; (2) a first patterned conductive layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first patterned conductive layer is adjacent to the substrate and opposite to the first surface of the first patterned conductive layer; (3) a first insulation layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first insulation layer is adjacent to the substrate and opposite to the first surface of the first insulation layer; and (4) a second patterned conductive layer extending from the first surface of the first insulation layer to the second surface of the substrate, the second patterned conductive layer electrically connected to the first patterned conductive layer.

    SEMICONDUCTOR DEVICES
    9.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20170229393A1

    公开(公告)日：2017-08-10

    申请号：US15019783

    申请日：2016-02-09

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Sheng-Chi HSIEH ,  Chih-Pin HUNG

    IPC: H01L23/522 ,  H01L23/528 ,  H01L23/535

    CPC classification number: H01L23/5227 ,  H01L23/49822

    Abstract: A semiconductor device includes a substrate and at least one inductor on the substrate. The inductor includes top portions separated from one another, bottom portions separated from one another, and side portions separated from one other. Each side portion extends between one of the top portions and one of the bottom portions. A semiconductor device includes a substrate, a first patterned conductive layer on the substrate, a second patterned conductive layer, and at least one dielectric layer between the first patterned conductive layer and the second patterned conductive layer. The first patterned conductive layer defines bottom crossbars separated from each other, each bottom crossbar including a bend angle. The second patterned conductive layer defines top crossbars separated from each other, wherein each top crossbar is electrically connected to a bottom crossbar.

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