公开(公告)号：US11437322B2

公开(公告)日：2022-09-06

申请号：US16560862

申请日：2019-09-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/538 ,  H01L23/13 ,  H01L25/16 ,  H01L23/552 ,  H01L23/31

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US11776863B2

公开(公告)日：2023-10-03

申请号：US17404912

申请日：2021-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L23/40

CPC classification number: H01L23/13 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2023/4087

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US11710689B2

公开(公告)日：2023-07-25

申请号：US17115629

申请日：2020-12-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin Yeh ,  Yu-Chang Chen

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/16

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49866 ,  H01L25/16

Abstract: A semiconductor device package includes a substrate, a first solder paste, an electrical contact and a first encapsulant. The substrate includes a conductive pad. The first solder paste is disposed on the pad. The electrical contact is disposed on the first solder paste. The first encapsulant encapsulates a portion of the electrical contact and exposes the surface of the electrical contact. The electrical contact has a surface facing away from the substrate. A melting point of the electrical contact is greater than that of the first solder paste. The first encapsulant includes a first surface facing toward the substrate and a second surface opposite to the first surface. The second surface of the first encapsulant is exposed to air.

公开(公告)号：US10861779B2

公开(公告)日：2020-12-08

申请号：US16268385

申请日：2019-02-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin Yeh ,  Yu-Chang Chen

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/16

Abstract: A semiconductor device package includes a substrate, a first solder paste, an electrical contact and a first encapsulant. The substrate includes a conductive pad. The first solder paste is disposed on the pad. The electrical contact is disposed on the first solder paste. The first encapsulant encapsulates a portion of the electrical contact and exposes the surface of the electrical contact. The electrical contact has a surface facing away from the substrate. A melting point of the electrical contact is greater than that of the first solder paste. The first encapsulant includes a first surface facing toward the substrate and a second surface opposite to the first surface. The second surface of the first encapsulant is exposed to air.

公开(公告)号：US11094602B2

公开(公告)日：2021-08-17

申请号：US16537371

申请日：2019-08-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L23/40

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US10332862B2

公开(公告)日：2019-06-25

申请号：US15698451

申请日：2017-09-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun Chen ,  Tang-Yuan Chen ,  Yu-Chang Chen ,  Jin-Feng Yang ,  Chin-Li Kao ,  Meng-Kai Shih

IPC: H01L25/00 ,  H01L25/065

Abstract: A semiconductor package structure includes a first substrate, at least one first semiconductor element and a second substrate. The first semiconductor element is attached to the first substrate. The second substrate defines a cavity and includes a plurality of thermal vias. One end of each of the thermal vias is exposed in the cavity, and the first semiconductor element is disposed within the cavity and thermally connected to the thermal vias.

公开(公告)号：US10096578B1

公开(公告)日：2018-10-09

申请号：US15643470

申请日：2017-07-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin Yeh ,  Yu-Chang Chen

IPC: H01L23/053 ,  H01L23/34 ,  H01L25/065 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor package device includes a substrate, an electronic component disposed on the substrate, and a package body. The electronic component has a first surface adjacent to the substrate and a second surface opposite to the first surface. The second surface has at least five edges, and the package body encapsulates the electronic component and exposes the second surface of the electronic component.

公开(公告)号：US12165984B2

公开(公告)日：2024-12-10

申请号：US17903921

申请日：2022-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L23/552 ,  H01L25/16

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.