公开(公告)号：US20230313378A1

公开(公告)日：2023-10-05

申请号：US17709931

申请日：2022-03-31

Applicant: Applied Materials, Inc.

Inventor： Yongjing Lin ,  Lei Zhou ,  Muhannad Mustafa ,  Shih Chung Chen ,  Zhihui Liu ,  Chi-Chou Lin ,  Bin Cao ,  Janardhan Devrajan ,  Mario D. Silvetti ,  Mandyam Sriram

IPC: C23C16/458 ,  C23C16/455

CPC classification number: C23C16/4586 ,  C23C16/45544

Abstract: Substrate support, substrate support assemblies and process chambers comprising same are described. The substrate support has a thermally conductive body with a top surface, a bottom surface and an outer edge, and a plurality of long edge purge channel outlet opening at the outer edge of the thermally conductive body. The substrate support is configured to support a substrate to be processed on a top surface of the substrate support. The top surface of the thermally conductive body may have a ceramic coating. Each of the plurality of purge channel outlet is in fluid communication with a long edge purge channel. The long edge purge channel is coated with a long edge purge channel coating. A substrate support assembly includes the substrate support and the support post coupled to the substrate support. The processing chamber include a chamber body and the substrate support within the chamber body.

公开(公告)号：US20250081593A1

公开(公告)日：2025-03-06

申请号：US18459582

申请日：2023-09-01

Applicant: Applied Materials ,Inc

Inventor： Yongjing Lin ,  Zhihui Liu ,  Sourav Garg ,  Lu Li ,  Haoming Yan ,  Haoyan Sha ,  Bhaskar Jyoti Bhuyan ,  Shih Chung Chen ,  Janardhan Devrajan ,  Srinivas Gandikota

IPC: H01L21/8238 ,  H01L21/02 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423

Abstract: Methods of manufacturing electronic devices, such as transistors (negative metal-oxide-semiconductor (NMOS) transistors (e.g., an N-metal stack) and positive metal-oxide-semiconductor (PMOS) transistors (e.g., a P-metal stack)) are described. Embodiments of the disclosure are directed to methods of improving PMOS transistor performance by inhibiting N-metal layer growth. The present disclosure provides two types of processes to reduce or inhibit N-metal layer growth. The disclosure provides methods which include forming a self-assembled monolayer (SAM) on the metal surface (e.g., titanium nitride (TiN)) of the PMOS, and methods which include forming a silicon-containing layer such as silicon oxide (SiOx) on the TiN surface. These two types of processes significantly reduce or inhibit the subsequent growth of an N-metal layer, such as titanium aluminum carbide (TiAlC), on the TiN surface of the PMOS.

公开(公告)号：US20240087899A1

公开(公告)日：2024-03-14

申请号：US17941557

申请日：2022-09-09

Applicant: Applied Materials, Inc.

Inventor： Zhihui Liu ,  Seshadri Ganguli ,  Tianyi Huang ,  Yixiong Yang ,  Srinivas Gandikota ,  Yuanhua Zheng ,  Yongjing Lin ,  Keyur Karandikar ,  Elizabeth Mao

IPC: H01L21/225 ,  H01L21/02 ,  H01L29/40

CPC classification number: H01L21/225 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/0234 ,  H01L29/401

Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. The methods include treating a surface of a metal gate stack with a radical treatment. The radical treatment may be used to treat one or more layers or surfaces of layers in the metal gate stack. The radical treatment may be performed once or multiple times during the methods described herein. The radical treatment comprises flowing one or more of nitrogen radicals (N2*) and hydrogen radicals (H*) over the surface of the metal gate stack.

公开(公告)号：US20250118563A1

公开(公告)日：2025-04-10

申请号：US18377619

申请日：2023-10-06

Applicant: Applied Materials, Inc.

Inventor： Yongjing Lin ,  Zhihui Liu ,  Shih Chung Chen ,  Haoyan Sha ,  Alexander Jansen ,  Zhebo Chen ,  Janardhan Devrajan ,  Tza-Jing Gung

IPC: H01L21/285 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: One or more embodiments of the disclosure are directed to methods of forming structures that are useful for FEOL and BEOL processes. Embodiments of the present disclosure advantageously provide methods of depositing a gapfill material, such as titanium nitride (TiN), in high aspect ratio (AR) structures with small dimensions. Some embodiments advantageously provide seam-free high-quality TiN films to fill high AR trenches with small dimensions. Embodiments of the present disclosure advantageously provide methods of filling 3D structures, such as FinFETs, GAAs, and the like, with a gapfill material without creating a seam. One or more embodiments include selective deposition processes using a carbon (C) layer in order to provide seam-free TiN gapfill in 3D structures, such as GAA devices.

公开(公告)号：US20240204061A1

公开(公告)日：2024-06-20

申请号：US18067979

申请日：2022-12-19

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Yixiong Yang ,  Yongjing Lin ,  Tuerxun Ailihumaer ,  Tengzhou Ma ,  Yuanhua Zheng ,  Zhihui Liu ,  Shih Chung Chen ,  Janardhan Devrajan ,  Yi Xu ,  Yu Lei ,  Mandyam Sriram

IPC: H01L29/40 ,  H01L29/423

CPC classification number: H01L29/401 ,  H01L29/42392 ,  H01L29/4925

Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide methods to reduce the resistance of the work function layer of an electronic device, as well as using a low resistivity metal for filling the gate.