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公开(公告)号:US20240194526A1
公开(公告)日:2024-06-13
申请号:US18581598
申请日:2024-02-20
发明人: Srinivas Gandikota , Steven C.H. Hung , Srinivas D. Nemani , Yixiong Yang , Susmit Singha Roy , Nikolaos Bekiaris
IPC分类号: H01L21/768 , H01L23/48
CPC分类号: H01L21/76864 , H01L21/76898 , H01L23/481
摘要: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.
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公开(公告)号:US20240154018A1
公开(公告)日:2024-05-09
申请号:US18411693
申请日:2024-01-12
发明人: Ria Someshwar , Seshadri Ganguli , Lan Yu , Siddarth Krishnan , Srinivas Gandikota , Jacqueline S. Wrench , Yixiong Yang
IPC分类号: H01L29/45 , H01L21/285 , H01L21/324 , H01L21/8238 , H01L29/40 , H01L29/66
CPC分类号: H01L29/456 , H01L21/28518 , H01L21/324 , H01L21/823814 , H01L29/401 , H01L29/45 , H01L29/665
摘要: Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor; pre-cleaning the substrate; depositing a titanium silicide (TiSi) layer on the n transistor and on the p transistor by plasma-enhanced chemical vapor deposition (PECVD); optionally depositing a first barrier layer on the titanium silicide (TiSi) layer and selectively removing the first barrier layer from the p transistor; selectively forming a molybdenum silicide (MoSi) layer on the titanium silicide (TiSi) layer on the n transistor and the p transistor; forming a second barrier layer on the molybdenum silicide (MoSi) layer; and annealing the semiconductor structure. The method may be performed in a processing chamber without breaking vacuum.
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公开(公告)号:US11932939B2
公开(公告)日:2024-03-19
申请号:US17242898
申请日:2021-04-28
发明人: Muhammad M. Rasheed , Srinivas Gandikota , Mario Dan Sanchez , Guoqiang Jian , Yixiong Yang , Deepak Jadhav , Ashutosh Agarwal
IPC分类号: C23C16/455 , C23C16/44 , C23C16/452 , H01J37/32
CPC分类号: C23C16/45544 , C23C16/4405 , C23C16/4408 , C23C16/4412 , C23C16/452 , C23C16/45502 , C23C16/45536 , C23C16/45565 , C23C16/45591 , H01J37/32357 , H01J37/3244 , H01J37/32449 , H01J37/32834
摘要: Apparatus for processing a substrate are provided herein. In some embodiments, a lid for a substrate processing chamber includes: a lid plate comprising an upper surface and a contoured bottom surface, the upper surface having a central opening and the contoured bottom surface having a first portion that extends downwardly and outwardly from the central opening to a peripheral portion of the lid plate and a second portion that extends radially outward along the peripheral portion of the lid plate; an upper flange extending radially outward from the lid plate; and one or more channels formed through the lid plate from the upper surface of the lid plate to the second portion of the contoured bottom surface.
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公开(公告)号:US11869806B2
公开(公告)日:2024-01-09
申请号:US17314515
申请日:2021-05-07
IPC分类号: H01L21/768 , H01L21/02
CPC分类号: H01L21/76877 , H01L21/02068 , H01L21/76831
摘要: Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.
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公开(公告)号:US20230260791A1
公开(公告)日:2023-08-17
申请号:US17673905
申请日:2022-02-17
IPC分类号: H01L21/28 , H01L21/324 , H01L21/8238
CPC分类号: H01L21/28088 , H01L21/324 , H01L21/28185 , H01L21/823807 , H01L21/823857
摘要: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which comprise an integrated dipole region to meet reduced thickness and lower thermal budget requirements. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, and a dipole region having an interfacial layer, a metal film substantially free of non-metal atoms on the interfacial layer, and a high-κ dielectric layer on the metal film. In some embodiments, the dipole region of the electronic devices comprises an interfacial layer, a high-κ dielectric layer on the interfacial layer, and a metal film on the high-κ dielectric layer. In some embodiments, the methods comprise annealing the substrate to drive particles of metal from the metal film into one or more of the interfacial layer or the high-κ dielectric layer.
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公开(公告)号:US11658218B2
公开(公告)日:2023-05-23
申请号:US17668992
申请日:2022-02-10
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
CPC分类号: H01L29/408 , H01L21/0228 , H01L21/02153 , H01L21/28158 , H01L29/513 , H01L29/517 , H01L29/7851
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
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公开(公告)号:US20230141748A1
公开(公告)日:2023-05-11
申请号:US18149226
申请日:2023-01-03
发明人: Yixiong Yang , Jacqueline S. Wrench , Yong Yang , Srinivas Gandikota , Annamalai Lakshmanan , Joung Joo Lee , Feihu Wang , Seshadri Ganguli
IPC分类号: H10B12/00 , H01L21/285 , C23C16/455 , H01L21/02
CPC分类号: H01L27/10891 , H01L21/28568 , H01L21/28556 , H01L21/2855 , C23C16/45553 , H01L21/02491 , H01L21/02631 , H01L21/823431
摘要: Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.
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公开(公告)号:US11552177B2
公开(公告)日:2023-01-10
申请号:US17013161
申请日:2020-09-04
发明人: Srinivas Gandikota , Steven C. H. Hung , Mandyam Sriram , Jacqueline S. Wrench , Yixiong Yang , Yong Yang
IPC分类号: H01L29/49 , H01L29/51 , H01L29/40 , H01L21/28 , H01L21/285
摘要: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 Å to less than or equal to 50 Å. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-κ metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.
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公开(公告)号:US20220359532A1
公开(公告)日:2022-11-10
申请号:US17308577
申请日:2021-05-05
发明人: Yong Yang , Kunal Bhatnagar , Srinivas Gandikota , Seshadri Ganguli , Jose Alexandro Romero , Mandyam Sriram , Mohith Verghese , Jacqueline S. Wrench , Yixiong Yang
IPC分类号: H01L27/108 , C23C16/42 , C23C16/455
摘要: Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.
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公开(公告)号:US20220359281A1
公开(公告)日:2022-11-10
申请号:US17314515
申请日:2021-05-07
IPC分类号: H01L21/768 , H01L21/02
摘要: Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.
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