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1.发明授权Systems and methods for clock mode determination utilizing divide ratio testing 有权使用分频比测试的时钟模式确定的系统和方法公开(公告)号：US07286069B1
公开(公告)日：2007-10-23
申请号：US11136215
申请日：2005-05-24
IPC分类号： H03M1/00
CPC分类号： G06F1/06
摘要： A system for determining a data converter operating mode includes measurement circuitry for measuring master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency and a mapping system for mapping the measurement of the frequency ratio to an operating mode of the data converter. The mapping system generates a set of candidate divide ratios for dividing the master clock frequency to generate corresponding internal master clock frequencies of an internal clock signal and determines the lowest divide ratio which generates a supported internal master clock frequency. In an alternate embodiment, the mapping system determines the divide ratio required by a filter of the data converter by dividing the data clock to master clock frequency ratio by a data clock to internal clock frequency ratio between the data clock frequency and the frequency of an internal clock signal. In additional embodiments, the mapping system gives preference to natural number divide ratios during mode mapping.
摘要翻译： 用于确定数据转换器操作模式的系统包括用于测量主时钟信号的主时钟频率和数据时钟信号的频率与主时钟频率之间的频率比的测量电路和用于映射频率测量的映射系统 与数据转换器的操作模式的比率。 映射系统产生一组候选分频比，用于划分主时钟频率以产生内部时钟信号的相应内部主时钟频率，并确定产生支持的内部主时钟频率的最低分频比。 在替代实施例中，映射系统通过将数据时钟与主时钟频率比除以数据时钟与数据时钟频率与内部频率之间的内部时钟频率比来确定数据转换器的滤波器所需的分频比 时钟信号。 在另外的实施例中，映射系统在模式映射期间优先考虑自然数分配比。
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2.发明授权Systems and methods for clock mode determination utilizing master clock frequency measurements 有权使用主时钟频率测量的时钟模式确定的系统和方法公开(公告)号：US07456765B1
公开(公告)日：2008-11-25
申请号：US11136030
申请日：2005-05-24
IPC分类号： H03M1/00
CPC分类号： H03M1/1265 , H04J3/0685
摘要： A system for determining a data converter clock operating mode includes measurement circuitry which measures a master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency, the frequency ratio, and a characteristic of an additional data clock signal to an operating mode of the data converter. In another embodiment, the mapping system maps measurements of the master clock frequency alone to a data converter operating mode. In a further embodiment, the measurement circuitry measures the master clock frequency of a master clock signal, which is received directly from a master clock signal source without a modification in the master clock frequency.
摘要翻译： 用于确定数据转换器时钟操作模式的系统包括测量主时钟信号的主时钟频率和数据时钟信号的频率与主时钟频率之间的频率比的测量电路。 映射系统将主时钟频率，频率比和附加数据时钟信号的特性的测量结果映射到数据转换器的操作模式。 在另一个实施例中，映射系统将主时钟频率的测量单独地映射到数据转换器操作模式。 在另一个实施例中，测量电路测量主时钟信号的主时钟频率，主时钟信号直接从主时钟信号源接收而不改变主时钟频率。
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3.发明授权Systems and methods for clock mode determination utilizing prioritization criteria 有权使用优先级标准的时钟模式确定的系统和方法公开(公告)号：US07352303B1
公开(公告)日：2008-04-01
申请号：US11135995
申请日：2005-05-24
IPC分类号： H03M7/00
CPC分类号： H03M1/1255 , G11B20/14
摘要： A system for determining a data converter operating mode includes measurement circuitry that measures a master clock frequency of a master clock signal received without a modification in frequency from a master clock signal source and that measures a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter. In other embodiments, mapping systems map the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter based on mode priority constraints. In additional embodiments, mapping systems map the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter by narrowing the choices of master clock divide ratios and subsequently determining an operating mode from the frequency ratio.
摘要翻译： 一种用于确定数据转换器操作模式的系统包括测量电路，其测量主时钟信号的主时钟频率，而无需主时钟信号源的频率修改，并且测量数据时钟信号的频率与数据时钟信号的频率之间的频率比 主时钟频率。 映射系统将主时钟频率和频率比的测量结果映射到数据转换器的操作模式。 在其他实施例中，映射系统基于模式优先级约束将主时钟频率和频率比的测量映射到数据转换器的操作模式。 在另外的实施例中，映射系统通过缩小主时钟分频比的选择并随后从频率比确定操作模式，将主时钟频率和频率比的测量值映射到数据转换器的工作模式。
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4.发明授权Systems and methods for clock mode determination utilizing explicit formulae and lookup tables 有权使用显式公式和查找表进行时钟模式确定的系统和方法公开(公告)号：US07057539B1
公开(公告)日：2006-06-06
申请号：US11136059
申请日：2005-05-24
IPC分类号： H03M1/00
CPC分类号： G01R23/005
摘要： A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal and measure a frequency ratio between a data clock frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing an explicit formula. In a further embodiment, the mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing a lookup table. In an additional embodiment, the mapping system tests an available set of operating modes, independent of any previous tests, to determine a suitable operating mode for the data converter.
摘要翻译： 一种用于确定数据转换器操作模式的系统包括可操作以测量主时钟信号的主时钟频率并测量数据时钟信号的数据时钟频率与主时钟频率之间的频率比的测量电路。 映射系统使用显式公式将主时钟频率和频率比的测量值映射到数据转换器的操作模式。 在另一实施例中，映射系统使用查找表将主时钟频率和频率比的测量值映射到数据转换器的操作模式。 在另外的实施例中，映射系统独立于任何先前的测试来测试可用的一组操作模式，以确定数据转换器的合适的操作模式。
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5.发明授权Systems and methods for clock mode determination utilizing a fixed-frequency reference signal 有权使用固定频率参考信号的时钟模式确定的系统和方法公开(公告)号：US07049988B1
公开(公告)日：2006-05-23
申请号：US11136060
申请日：2005-05-24
IPC分类号： H03M1/00
CPC分类号： G11B20/10222 , G11B20/10009
摘要： A system for determining a data converter operating mode including measurement circuitry operable to measure a master clock frequency by comparing a frequency of a master clock signal and a frequency of a fixed frequency clock signal and operable to measure a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter. In one particular embodiment, the fixed frequency clock signal is provided by an oscillator. In a further embodiment, the master clock signal is generated by multiplying the frequency of another clock signal.
摘要翻译： 一种用于确定数据转换器操作模式的系统，包括测量电路，可操作以通过比较主时钟信号的频率和固定频率时钟信号的频率来测量主时钟频率，并可操作以测量数据频率之间的频率比 时钟信号和主时钟频率。 映射系统将主时钟频率和频率比的测量结果映射到数据转换器的操作模式。 在一个具体实施例中，固定频率时钟信号由振荡器提供。 在另一实施例中，主时钟信号是通过将另一个时钟信号的频率相乘而产生的。
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公开(公告)号：US07379834B1
公开(公告)日：2008-05-27
申请号：US11135682
申请日：2005-05-24
CPC分类号： H04J3/0685 , G11B20/10222 , G11B20/14 , H03L7/00
摘要： A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal, the master clock frequency measurement biased by a past operating mode selection, and operable to measure a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter. In an additional embodiment, the measurement circuitry biases the master clock frequency measurement based on a past master clock frequency measurement.
摘要翻译： 一种用于确定数据转换器操作模式的系统包括测量电路，其可操作以测量主时钟信号的主时钟频率，主时钟频率测量由过去操作模式选择偏置，并且可操作以测量频率之间的频率比 数据时钟信号和主时钟频率。 映射系统将主时钟频率和频率比的测量结果映射到数据转换器的操作模式。 在另外的实施例中，测量电路基于过去的主时钟频率测量来偏置主时钟频率测量。
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7.发明授权Systems and methods for clock mode determination utilizing operating conditions measurement 有权使用操作条件测量的时钟模式确定的系统和方法公开(公告)号：US07236109B1
公开(公告)日：2007-06-26
申请号：US11135866
申请日：2005-05-24
IPC分类号： H03M7/00
CPC分类号： G11B20/10009 , G11B20/10222
摘要： A system for determining a data converter operating mode includes measurement circuitry which measures a master clock frequency, measures a frequency ratio between a frequency of a data clock signal and the master clock frequency, and measures a selected operating condition of the data converter. A mapping system maps the measurements of the master clock frequency, the frequency ratio, and the selected operating condition, to an operating mode of the data converter. In another embodiment, the measurement circuitry adjusts the measurement of the master clock frequency in response to a measurement of the operating conditions of the data converter. In a further embodiment, user input information varies the measurement of the master clock frequency.
摘要翻译： 用于确定数据转换器操作模式的系统包括测量主时钟频率的测量电路，测量数据时钟信号的频率与主时钟频率之间的频率比，并且测量数据转换器的所选择的操作条件。 映射系统将主时钟频率，频率比和所选择的操作条件的测量值映射到数据转换器的操作模式。 在另一个实施例中，测量电路响应于数据转换器的操作条件的测量来调整主时钟频率的测量。 在另一实施例中，用户输入信息改变主时钟频率的测量。
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8.发明申请Switch-Mode Converter Operating in a Hybrid Discontinuous Conduction Mode (DCM)/Continuous Conduction Mode (CCM) That Uses Double or More Pulses in a Switching Period 审中-公开开关模式转换器工作在混合不连续导通模式（DCM）/连续导通模式（CCM），在开关周期中使用双脉冲或更多脉冲公开(公告)号：US20120194143A1
公开(公告)日：2012-08-02
申请号：US13351069
申请日：2012-01-16
IPC分类号： G05F1/70
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A switching converter controller and method for controlling a switch-mode converter in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) mode are disclosed. The hybrid mode involves using double (two) or more switching pulses in a switching period of a control signal for controlling the switch-mode converter. The switching period is defined by a switch on-time duration, a switch off-time duration, and an N number of switching pulses. N is an integer greater than one. An inductor current through the inductor of the switch-mode converter is zero before an initial switching pulse, is zero after a last switching pulse, and is non-zero for all other times within the switching period. The switch-mode-converter controller can be used as a power factor correction controller for a power factor corrector. The switch-mode converter controller can be implemented on a single integrated circuit.
摘要翻译： 公开了一种用于控制混合不连续导通模式（DCM）/连续导通模式（CCM）模式中的开关模式转换器的开关转换器控制器和方法。 混合模式涉及在用于控制开关模式转换器的控制信号的开关周期中使用双（2）个或更多个开关脉冲。 开关周期由开关导通时间，开关关断时间和N个开关脉冲限定。 N是大于1的整数。 在初始切换脉冲之前，通过开关模式转换器的电感器的电感电流为零，在最后一个开关脉冲之后为零，并且在开关周期内的所有其他时间都为非零。 开关模式转换器控制器可用作功率因数校正器的功率因数校正控制器。 开关模式转换器控制器可以在单个集成电路上实现。
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9.发明授权Switch-mode converter operating in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) that uses double or more pulses in a switching period 有权开关模式转换器在混合不连续导通模式（DCM）/连续导通模式（CCM）中工作，在开关周期中使用双倍或更多脉冲公开(公告)号：US08125805B1
公开(公告)日：2012-02-28
申请号：US12113536
申请日：2008-05-01
IPC分类号： H02M7/217
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A switching converter controller and method for controlling a switch-mode converter in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) mode are disclosed. The hybrid mode involves using double (two) or more switching pulses in a switching period of a control signal for controlling the switch-mode converter. The switching period is defined by a switch on-time duration, a switch off-time duration, and an N number of switching pulses. N is an integer greater than one. An inductor current through the inductor of the switch-mode converter is zero before an initial switching pulse, is zero after a last switching pulse, and is non-zero for all other times within the switching period. The switch-mode converter controller can be used as a power factor correction controller for a power factor corrector. The switch-mode converter controller can be implemented on a single integrated circuit.
摘要翻译： 公开了一种用于控制混合不连续导通模式（DCM）/连续导通模式（CCM）模式中的开关模式转换器的开关转换器控制器和方法。 混合模式涉及在用于控制开关模式转换器的控制信号的开关周期中使用双（2）个或更多个开关脉冲。 开关周期由开关导通时间，开关关断时间和N个开关脉冲限定。 N是大于1的整数。 在初始切换脉冲之前，通过开关模式转换器的电感器的电感电流为零，在最后一个开关脉冲之后为零，并且在开关周期内的所有其他时间都为非零。 开关模式转换器控制器可用作功率因数校正器的功率因数校正控制器。 开关模式转换器控制器可以在单个集成电路上实现。
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10.发明授权Non-invasive, low pin count test circuits and methods utilizing emulated stress conditions 有权非侵入性，低引脚数测试电路和利用模拟应力条件的方法公开(公告)号：US07808263B2
公开(公告)日：2010-10-05
申请号：US12381774
申请日：2009-03-17
IPC分类号： G01R31/02
CPC分类号： G01R31/2884
摘要： An integrated circuit including at least one internal operational block, which includes test control circuitry for initiating a test mode and testing circuitry for verifying an operation of the integrated circuit under a more stringent condition in the test mode as compared to a condition in another operating mode such that proper operation of the integrated circuit is assured in the another operating mode. Pin control circuitry selectively outputs a test signal from a selected pin in the test mode indicative of the operation of the internal block, wherein the selected pin is utilized for exchanging another signal when the integrated circuit is in the another operating mode.
摘要翻译： 一种集成电路，包括至少一个内部操作块，其包括用于启动测试模式的测试控制电路和用于在测试模式中在更严格的条件下验证集成电路的操作的测试电路，与其他操作模式中的条件相比 使得在另一操作模式下确保集成电路的正确操作。 引脚控制电路在指示内部块的操作的测试模式中选择性地输出来自所选引脚的测试信号，其中当集成电路处于另一操作模式时，所选择的引脚用于交换另一信号。
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