公开(公告)号：US20180046239A1

公开(公告)日：2018-02-15

申请号：US15233624

申请日：2016-08-10

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Edmund Mark SCHNEIDER ,  Daniel J. ALLEN ,  Saurabh SINGH ,  Aniruddha SATOSKAR

IPC: G06F1/32 ,  G06F1/26 ,  H04R3/04 ,  H03M1/12

Abstract: A system may include a plurality of processing paths and a controller. The processing paths may include a first processing path configured to generate a first digital signal based on an analog input signal and one or more other processing paths each configured to consume a smaller amount of power than the first processing path, and each configured to generate a respective digital signal based on the analog input signal, wherein one of the other processing paths has a noise floor based on fidelity characteristics of the analog input signal or subsequent processing requirements of a digital output signal generated from at least one of the first digital signal and the respective digital signals. The controller may be configured to select one of the first digital signal and the respective digital signals as the digital output signal of the processing system based on a magnitude of the analog input signal.

公开(公告)号：US20190058484A1

公开(公告)日：2019-02-21

申请号：US16168067

申请日：2018-10-23

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Ramin ZANBAGHI ,  Daniel J. ALLEN ,  John L. MELANSON ,  Aniruddha SATOSKAR ,  Akshay GODBOLE

IPC: H03M1/18 ,  H04R3/04 ,  H03H19/00

CPC classification number: H03M1/188 ,  H03G3/3052 ,  H03H19/004 ,  H03M1/00 ,  H03M1/12 ,  H03M1/121 ,  H03M1/186 ,  H03M1/804 ,  H03M3/468 ,  H03M3/492 ,  H04L25/061 ,  H04R3/04

Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.A system may include a plurality of processing paths having a first path configured to generate a first digital signal based on an analog input signal and a second path configured to generate a second digital signal based on the analog input signal, the second path having a high-pass filter for filtering the analog input signal prior to the analog input signal being processed by the remainder of the second path, and the high-pass filter having a corner frequency. Control circuitry may be configured to determine frequency-dependent weighted proportions of the first and second digital signals to be combined into an output digital signal based on a characteristic of the analog input signal. Frequency-dependent weighted proportions may be such that the digital output signal includes spectral content of the first digital signal below the corner frequency to account for spectral content of the second digital signal below the corner frequency being filtered.A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.

公开(公告)号：US20180048325A1

公开(公告)日：2018-02-15

申请号：US15234741

申请日：2016-08-11

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Edmund Mark SCHNEIDER ,  Daniel J. ALLEN ,  Saurabh SINGH ,  Aniruddha SATOSKAR

IPC: H03M1/12 ,  G06F13/42 ,  G06F13/40

CPC classification number: H03M1/12 ,  G06F13/4022 ,  G06F13/4282 ,  H03M1/0872 ,  H03M1/0881 ,  H03M1/188

Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.