公开(公告)号：US08503257B2

公开(公告)日：2013-08-06

申请号：US12847769

申请日：2010-07-30

申请人： Daniel J. Post ,  Hsiao Thio

发明人： Daniel J. Post ,  Hsiao Thio

IPC分类号： G11C7/00

CPC分类号： G06F11/008 ,  G11C16/3418 ,  G11C16/349 ,  G11C29/76 ,  G11C29/82 ,  G11C2029/0411

摘要： Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.

摘要翻译： 公开了用于基于在非易失性存储器（“NVM”）上执行的读取操作的一个或多个特性来处理读取干扰的系统和方法。 在一些实施例中，系统的控制电路可以产生基于读取操作的一个或多个特性确定的可变损伤值。 使用损伤值，控制电路可以更新与该块相关联的得分。 如果控制电路确定分数超过预定阈值，则该块的至少一部分可被重定位到NVM中的不同存储器位置。 在一些实施例中，块的部分可以在一段时间内重新定位。

公开(公告)号：US08832507B2

公开(公告)日：2014-09-09

申请号：US12861718

申请日：2010-08-23

申请人： Daniel J. Post ,  Hsiao Thio

发明人： Daniel J. Post ,  Hsiao Thio

IPC分类号： G11C29/00 ,  G06F12/02 ,  G06F11/10 ,  H03M13/09 ,  G11C29/04 ,  H03M13/15

CPC分类号： G06F11/1048 ,  G06F12/0246 ,  G06F2212/7208 ,  G11C29/82 ,  G11C29/883 ,  G11C2029/0411 ,  H03M13/09 ,  H03M13/1515 ,  H03M13/152

摘要： Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block.

摘要翻译： 公开了用于从非易失性存储器（“NVM”）的一个或多个生长的坏块生成动态超级块的系统和方法。 在一些实施例中，动态超级块可以通过将来自NVM的一个或多个管芯的生长的坏块的存储器位置的子集拼接在一起而形成。 可以基于存储器位置的子集的至少一个可靠性测量来选择存储器位置的子集。 在一些实施例中，响应于检测动态超级块的一部分中的一个或多个访问失败，NVM接口可以使动态超级块的至少一部分退役。 在一些实施例中，NVM接口可以通过逐渐增加新的动态超级块的大小从动态超级块重建新的动态超级块。

公开(公告)号：US20110173462A1

公开(公告)日：2011-07-14

申请号：US12843419

申请日：2010-07-26

申请人： Nir J. Wakrat ,  Daniel J. Post ,  Kenneth Herman ,  Vadim Khmelnitsky ,  Nick Seroff ,  Hsiao Thio ,  Matthew Byom

发明人： Nir J. Wakrat ,  Daniel J. Post ,  Kenneth Herman ,  Vadim Khmelnitsky ,  Nick Seroff ,  Hsiao Thio ,  Matthew Byom

IPC分类号： G06F1/00

CPC分类号： G11C16/30 ,  G06F1/26 ,  G06F1/3203

摘要： Systems and methods are disclosed for managing the peak power consumption of a system, such as a non-volatile memory system (e.g., flash memory system). The system can include multiple subsystems and a controller for controlling the subsystems. Each subsystem may have a current profile that is peaky. Thus, the controller may control the peak power of the system by, for example, limiting the number of subsystems that can perform power-intensive operations at the same time or by aiding a subsystem in determining the peak power that the subsystem may consume at any given time.

摘要翻译： 公开了用于管理诸如非易失性存储器系统（例如，闪存系统）的系统的峰值功率消耗的系统和方法。 该系统可以包括多个子系统和用于控制子系统的控制器。 每个子系统可以具有峰值的当前轮廓。 因此，控制器可以通过例如限制可以同时执行功率密集型操作的子系统的数量来控制系统的峰值功率，或通过辅助子系统来确定子系统可能消耗的峰值功率 给定时间

公开(公告)号：US20120047409A1

公开(公告)日：2012-02-23

申请号：US12861718

申请日：2010-08-23

申请人： Daniel J. Post ,  Hsiao Thio

发明人： Daniel J. Post ,  Hsiao Thio

IPC分类号： G06F12/00 ,  G06F11/26 ,  G06F11/10 ,  G11C29/08 ,  H03M13/05

CPC分类号： G06F11/1048 ,  G06F12/0246 ,  G06F2212/7208 ,  G11C29/82 ,  G11C29/883 ,  G11C2029/0411 ,  H03M13/09 ,  H03M13/1515 ,  H03M13/152

摘要： Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block.

摘要翻译： 公开了用于从非易失性存储器（“NVM”）的一个或多个生长的坏块生成动态超级块的系统和方法。 在一些实施例中，动态超级块可以通过将来自NVM的一个或多个管芯的生长的坏块的存储器位置的子集拼接在一起而形成。 可以基于存储器位置的子集的至少一个可靠性测量来选择存储器位置的子集。 在一些实施例中，响应于检测动态超级块的一部分中的一个或多个访问失败，NVM接口可以使动态超级块的至少一部分退役。 在一些实施例中，NVM接口可以通过逐渐增加新的动态超级块的大小从动态超级块重建新的动态超级块。

公开(公告)号：US20120030506A1

公开(公告)日：2012-02-02

申请号：US12847769

申请日：2010-07-30

申请人： Daniel J. Post ,  Hsiao Thio

发明人： Daniel J. Post ,  Hsiao Thio

IPC分类号： G06F11/20 ,  G06F12/02 ,  G06F12/00

CPC分类号： G06F11/008 ,  G11C16/3418 ,  G11C16/349 ,  G11C29/76 ,  G11C29/82 ,  G11C2029/0411

摘要： Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.

摘要翻译： 公开了用于基于在非易失性存储器（“NVM”）上执行的读取操作的一个或多个特性来处理读取干扰的系统和方法。 在一些实施例中，系统的控制电路可以产生基于读取操作的一个或多个特性确定的可变损伤值。 使用损伤值，控制电路可以更新与该块相关联的得分。 如果控制电路确定分数超过预定阈值，则该块的至少一部分可被重定位到NVM中的不同存储器位置。 在一些实施例中，块的部分可以在一段时间内重新定位。

公开(公告)号：US08892981B2

公开(公告)日：2014-11-18

申请号：US12895031

申请日：2010-09-30

申请人： Daniel J. Post ,  Kenneth Herman

发明人： Daniel J. Post ,  Kenneth Herman

IPC分类号： G11C29/00 ,  G11C29/52 ,  G11C16/34 ,  G06F11/10 ,  H03M13/27 ,  H03M13/09 ,  G11C29/04 ,  H03M13/15

CPC分类号： H03M13/2707 ,  G06F11/1048 ,  G11C16/3418 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/09 ,  H03M13/1515 ,  H03M13/152

摘要： Systems and methods are disclosed for data recovery using outer codewords stored in volatile memory. Outer codewords can be associated with one or more horizontal portions or vertical portions of a non-volatile memory (“NVM”). In some embodiments, an NVM interface of an electronic device can program user data to a super block of the NVM. The NVM interface can then determine if a program disturb has occurred in the super block. In response to detecting that a program disturb has occurred in the super block, the NVM interface can perform garbage collection on the super block. The NVM interface can then use outer codewords associated with the super block to recover from any uncorrectable error correction code errors detected in the super block.

摘要翻译： 公开了使用存储在易失性存储器中的外部码字进行数据恢复的系统和方法。 外部码字可以与非易失性存储器（“NVM”）的一个或多个水平部分或垂直部分相关联。 在一些实施例中，电子设备的NVM接口可以将用户数据编程到NVM的超级块。 然后，NVM接口可以确定在超级块中是否发生了程序干扰。 响应于检测到超级块中发生了程序干扰，NVM接口可以在超级块上执行垃圾收集。 然后，NVM接口可以使用与超级块相关联的外部码字从在超级块中检测到的任何不可校正的纠错码错误中恢复。

公开(公告)号：US08850160B2

公开(公告)日：2014-09-30

申请号：US12861687

申请日：2010-08-23

申请人： Daniel J. Post ,  Brian Sutton

发明人： Daniel J. Post ,  Brian Sutton

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246

摘要： Systems and methods are disclosed for adaptive writing behavior for a system having non-volatile memory (“NVM”). A memory interface of a system can be configured to determine whether a write preference of the system is skip-sequential. In response to determining that the write preference is skip-sequential, the memory interface can sequentially program data to a first set of pages of a block of the NVM. In addition, the memory interface can sequentially pre-merge gaps between the first set of pages with one or more pages of a data block. Moreover, the memory interface can be configured to switch to an alternative programming state in response to determining that at least one condition has been satisfied. For example, the memory interface can stop programming data sequentially, and instead program data in the order that the data is received from a file system.

摘要翻译： 公开了用于具有非易失性存储器（“NVM”）的系统的自适应写入行为的系统和方法。 可以将系统的存储器接口配置为确定系统的写入偏好是否是顺序的。 响应于确定写优先级是顺序的，存储器接口可以顺序地将数据编程到NVM的块的第一组页面。 此外，存储器接口可以顺序地将第一组页面之间的间隙与数据块的一个或多个页面预先合并。 此外，响应于确定已经满足至少一个条件，存储器接口可被配置为切换到备选编程状态。 例如，存储器接口可以顺序地停止编程数据，而是以从文件系统接收数据的顺序来编程数据。

公开(公告)号：US08799555B2

公开(公告)日：2014-08-05

申请号：US13086590

申请日：2011-04-14

申请人： Daniel J. Post ,  Matthew Byom

发明人： Daniel J. Post ,  Matthew Byom

IPC分类号： G06F13/28

CPC分类号： G06F12/0638

摘要： Systems and methods are provided for storing and retrieving boot data (e.g., a first stage bootloader) in and from a non-volatile memory (“NVM”), such as a NAND flash memory. To increase storage reliability, the boot data may be stored in a subset of the pages in a boot data storage area, such as in only lower pages. The subset may be selected based on the specific operating specifications and characteristics of the NVM. To prevent a boot ROM from having to maintain a NVM-specific map of which pages are used to store boot data, the map may be maintained in the NVM itself. For example, the map may be in the form of a linked list, where each page storing boot data can include a pointer that points to the next page that stores boot data.

摘要翻译： 系统和方法被提供用于存储和检索非易失性存储器（“NVM”）内的引导数据（例如，第一级引导加载程序），例如NAND闪存。 为了提高存储可靠性，引导数据可以存储在引导数据存储区域中的页面的子集中，例如仅在较低的页面中。 可以基于NVM的特定操作规范和特性来选择该子集。 为了防止引导ROM不必维护用于存储引导数据的哪些页面的NVM特定映射，可以在NVM本身中维护映射。 例如，映射可以是链表的形式，其中存储引导数据的每个页面可以包括指向存储引导数据的下一页的指针。

公开(公告)号：US08661316B2

公开(公告)日：2014-02-25

申请号：US12729564

申请日：2010-03-23

申请人： Daniel J. Post

发明人： Daniel J. Post

IPC分类号： G06F11/10

摘要： This can relate to non-regular parity distribution of a non-volatile memory (“NVM”), such as flash memory, and detection of the non-regular parity via a metadata tag. For example, each codeword of the NVM can include one or more parity pages that may be distributed at random through the NVM. To identify the page as a parity page, a parity page marker can be included in the metadata of that page. During power-up of the NVM, an address table including the logical-to-physical address mapping of the pages can be created. Pages including a parity page marker, however, can be skipped during the creation of this address table. Additionally, by having two or more parity pages associated with a codeword, an additional layer of protection can be provided for repairing errors in that codeword.

公开(公告)号：US08650446B2

公开(公告)日：2014-02-11

申请号：US12730551

申请日：2010-03-24

申请人： Matthew Byom ,  Nir J. Wakrat ,  Kenneth Herman ,  Daniel J. Post

发明人： Matthew Byom ,  Nir J. Wakrat ,  Kenneth Herman ,  Daniel J. Post

IPC分类号： G11C29/00

CPC分类号： G11C29/44 ,  G06F11/1048 ,  G11C16/04 ,  G11C29/10 ,  G11C29/42 ,  G11C29/56008 ,  G11C2029/4402

摘要： Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. The NVM may be managed based on results of a test performed on the NVM. The test may indicate, for example, physical memory locations that may be susceptible to errors, such as certain pages in the blocks of the NVM. Tests on multiple NVMs of the same type may be compiled to create a profile of error tendencies for that type of NVM. In some embodiments, data may be stored in the NVM based on individual test results for the NVM or based on a profile of the NVM type. For example, memory locations susceptible to error may be retired or data stored in those memory locations may be protected by a stronger error correcting code.

摘要翻译： 公开了用于管理诸如闪存之类的非易失性存储器（“NVM”）的系统和方法。 NVM可以基于对NVM执行的测试结果进行管理。 测试可以指示例如可能易于出现错误的物理存储器位置，例如NVM的块中的某些页面。 可以对相同类型的多个NVM进行测试，以创建该类型的NVM的错误倾向简档。 在一些实施例中，可以基于NVM的单独测试结果或基于NVM类型的简档来将数据存储在NVM中。 例如，易于出现错误的存储器位置可能会被退出，或者存储在这些存储单元中的数据可能被更强的纠错码保护。