公开(公告)号：US09318584B2

公开(公告)日：2016-04-19

申请号：US14492582

申请日：2014-09-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Peng Cheng ,  Peter B. Gray ,  Vibhor Jain ,  Robert K. Leidy ,  Qizhi Liu

IPC: H01L29/732 ,  H01L29/66 ,  H01L29/737 ,  H01L21/762

CPC classification number: H01L29/732 ,  H01L21/76229 ,  H01L21/76283 ,  H01L29/66242 ,  H01L29/7378

Abstract: Device structures and design structures for a bipolar junction transistor. The device structure includes a collector region in a substrate, a plurality of isolation structures extending into the substrate and comprised of an electrical insulator, and an isolation region in the substrate. The isolation structures have a length and are arranged with a pitch transverse to the length such that each adjacent pair of the isolation structures is separated by a respective section of the substrate. The isolation region is laterally separated from at least one of the isolation structures by a first portion of the collector region. The isolation region laterally separates a second portion of the collector region from the first portion of the collector region. The device structure further includes an intrinsic base on the second portion of the collector region and an emitter on the intrinsic base. The emitter has a length transversely oriented relative to the length of the isolation structures.

Abstract translation: 双极结型晶体管的器件结构和设计结构。 器件结构包括衬底中的集电极区域，延伸到衬底中并由电绝缘体构成的多个隔离结构以及衬底中的隔离区域。 隔离结构具有长度并且以横向于长度的间距布置，使得每个相邻的一对隔离结构被基板的相应部分分开。 隔离区域通过集电区域的第一部分与隔离结构中的至少一个横向分离。 隔离区域将收集区域的第二部分与收集器区域的第一部分横向分离。 器件结构还包括在集电极区域的第二部分上的本征基极和在本征基极上的发射极。 发射极相对于隔离结构的长度具有横向定向的长度。

公开(公告)号：US09496377B2

公开(公告)日：2016-11-15

申请号：US14747525

申请日：2015-06-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  Peng Cheng ,  Vibhor Jain ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L29/732 ,  H01L29/73 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L29/732 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/73 ,  H01L29/7371

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. An intrinsic base layer is formed on a semiconductor substrate, an etch stop layer is formed on the intrinsic base layer, and an extrinsic base layer is formed on the etch stop layer. A trench is formed that penetrates through the extrinsic base layer to the etch stop layer. The trench is formed by etching the extrinsic base layer selective to the etch stop layer. The first trench is extended through the etch stop layer to the intrinsic base layer by etching the etch stop layer selective to the intrinsic base layer. After the trench is extended through the etch stop layer, an emitter is formed using the trench.

公开(公告)号：US09437717B2

公开(公告)日：2016-09-06

申请号：US13971982

申请日：2013-08-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Kevin K. Chan ,  Peng Cheng ,  Qizhi Liu ,  Ljubo Radic

IPC: H01L29/73 ,  H01L29/66 ,  H01L29/737 ,  H01L29/10 ,  G06F17/50

CPC classification number: H01L29/73 ,  G06F17/5045 ,  H01L29/1004 ,  H01L29/66272 ,  H01L29/7371

Abstract: Methods of fabricating bipolar junction transistors, bipolar junction transistors, and design structures for a bipolar junction transistor. A first portion of the intrinsic base layer is masked while a second portion of an intrinsic base layer is etched. As a consequence of the masking, the second portion of the intrinsic base layer is thinner than the first portion of the intrinsic base layer. An emitter and an extrinsic base layer are formed in respective contacting relationships with the first and second portions of the intrinsic base layer.