公开(公告)号：US20170278955A1

公开(公告)日：2017-09-28

申请号：US15081443

申请日：2016-03-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Renata Camillo-Castillo ,  Qizhi Liu ,  John J. Pekarik ,  Alvin J. Joseph ,  Peter B. Gray

IPC: H01L29/732 ,  H01L21/762 ,  H01L29/08 ,  H01L29/417 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/732 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/41708 ,  H01L29/73

Abstract: Device structures for a bipolar junction transistor and methods for fabricating a device structure using a substrate. One or more primary trench isolation regions are formed that surround an active device region of the substrate and a collector contact region of the substrate. A base layer is formed on the active device region and the collector contact region, and the active device region includes a collector. Each primary trench isolation region extends vertically to a first depth into the substrate. A trench is formed laterally located between the base layer and the collector contact region and that extends vertically through the base layer and into the substrate to a second depth that is less than the first depth. A dielectric is formed in the trench to form a secondary trench isolation region. An emitter is formed on the base layer.

公开(公告)号：US09318584B2

公开(公告)日：2016-04-19

申请号：US14492582

申请日：2014-09-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Peng Cheng ,  Peter B. Gray ,  Vibhor Jain ,  Robert K. Leidy ,  Qizhi Liu

IPC: H01L29/732 ,  H01L29/66 ,  H01L29/737 ,  H01L21/762

CPC classification number: H01L29/732 ,  H01L21/76229 ,  H01L21/76283 ,  H01L29/66242 ,  H01L29/7378

Abstract: Device structures and design structures for a bipolar junction transistor. The device structure includes a collector region in a substrate, a plurality of isolation structures extending into the substrate and comprised of an electrical insulator, and an isolation region in the substrate. The isolation structures have a length and are arranged with a pitch transverse to the length such that each adjacent pair of the isolation structures is separated by a respective section of the substrate. The isolation region is laterally separated from at least one of the isolation structures by a first portion of the collector region. The isolation region laterally separates a second portion of the collector region from the first portion of the collector region. The device structure further includes an intrinsic base on the second portion of the collector region and an emitter on the intrinsic base. The emitter has a length transversely oriented relative to the length of the isolation structures.

Abstract translation: 双极结型晶体管的器件结构和设计结构。 器件结构包括衬底中的集电极区域，延伸到衬底中并由电绝缘体构成的多个隔离结构以及衬底中的隔离区域。 隔离结构具有长度并且以横向于长度的间距布置，使得每个相邻的一对隔离结构被基板的相应部分分开。 隔离区域通过集电区域的第一部分与隔离结构中的至少一个横向分离。 隔离区域将收集区域的第二部分与收集器区域的第一部分横向分离。 器件结构还包括在集电极区域的第二部分上的本征基极和在本征基极上的发射极。 发射极相对于隔离结构的长度具有横向定向的长度。

公开(公告)号：US09231087B2

公开(公告)日：2016-01-05

申请号：US14677303

申请日：2015-04-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Benoit ,  James R. Elliott ,  Peter B. Gray ,  Alvin J. Joseph ,  Qizhi Liu ,  Christa R. Willets

IPC: H01L29/732 ,  H01L29/66 ,  H01L29/06 ,  H01L29/737

CPC classification number: H01L29/732 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/66272 ,  H01L29/7371 ,  H01L29/7378

Abstract: Device structures, design structures, and fabrication methods for a bipolar junction transistor. A first layer comprised of a first semiconductor material and a second layer comprised of a second semiconductor material are disposed on a substrate containing a first terminal of the bipolar junction transistor. The second layer is disposed on the first layer and a patterned etch mask is formed on the second layer. A trench extends through the pattern hardmask layer, the first layer, and the second layer and into the substrate. The trench defines a section of the first layer stacked with a section of the second layer. A selective etching process is used to narrow the section of the second layer relative to the section of the first layer to define a second terminal and to widen a portion of the trench in the substrate to undercut the section of the first layer.

公开(公告)号：US10367083B2

公开(公告)日：2019-07-30

申请号：US15081443

申请日：2016-03-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Renata Camillo-Castillo ,  Qizhi Liu ,  John J. Pekarik ,  Alvin J. Joseph ,  Peter B. Gray

IPC: H01L29/732 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/417 ,  H01L21/762 ,  H01L29/73

Abstract: Device structures for a bipolar junction transistor and methods for fabricating a device structure using a substrate. One or more primary trench isolation regions are formed that surround an active device region of the substrate and a collector contact region of the substrate. A base layer is formed on the active device region and the collector contact region, and the active device region includes a collector. Each primary trench isolation region extends vertically to a first depth into the substrate. A trench is formed laterally located between the base layer and the collector contact region and that extends vertically through the base layer and into the substrate to a second depth that is less than the first depth. A dielectric is formed in the trench to form a secondary trench isolation region. An emitter is formed on the base layer.

公开(公告)号：US20190181250A1

公开(公告)日：2019-06-13

申请号：US16278268

申请日：2019-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Renata Camillo-Castillo ,  Qizhi Liu ,  John J. Pekarik ,  Alvin J. Joseph ,  Peter B. Gray

IPC: H01L29/732 ,  H01L29/08 ,  H01L21/762 ,  H01L29/417 ,  H01L29/73 ,  H01L29/10 ,  H01L29/06

Abstract: Device structures for a bipolar junction transistor and methods for fabricating a device structure using a substrate. One or more primary trench isolation regions are formed that surround an active device region of the substrate and a collector contact region of the substrate. A base layer is formed on the active device region and the collector contact region, and the active device region includes a collector. Each primary trench isolation region extends vertically to a first depth into the substrate. A trench is formed laterally located between the base layer and the collector contact region and that extends vertically through the base layer and into the substrate to a second depth that is less than the first depth. A dielectric is formed in the trench to form a secondary trench isolation region. An emitter is formed on the base layer.