Integrated circuit device and method of performing cut-through forwarding of packet data
    2.
    发明授权
    Integrated circuit device and method of performing cut-through forwarding of packet data 有权
    集成电路装置及分组数据的切换转发方法

    公开(公告)号:US09450894B2

    公开(公告)日:2016-09-20

    申请号:US14125203

    申请日:2011-06-15

    申请人: Graham Edmiston

    发明人: Graham Edmiston

    摘要: An integrated circuit device includes a cut-through forwarding module. The cut-through forwarding module includes at least one receiver component arranged to receive data to be forwarded, and at least one transmitter component arranged to transmit data stored within at least one transmitter buffer thereof. The cut-through forwarding module further includes at least one delimiter component arranged to trigger a transmission of frame data within the at least one transmitter buffer, upon receipt of a first number elements of a respective data frame by the at least one receiver component, the first number of data elements comprising a first predefined integer value.

    摘要翻译: 集成电路装置包括一个直通转发模块。 切入转发模块包括布置成接收要转发的数据的至少一个接收器组件,以及布置成发送存储在其至少一个发射机缓冲器内的数据的至少一个发射机组件。 直通转发模块还包括至少一个限定器组件,其被布置成在由至少一个接收器组件接收到相应数据帧的第一数字元素时触发至少一个发射器缓冲器内的帧数据的传输, 第一数量的数据元素包括第一预定整数值。

    CUT-THROUGH FORWARDING MODULE AND A METHOD OF RECEIVING AND TRANSMITTING DATA FRAMES IN A CUT-THROUGH FORWARDING MODE
    3.
    发明申请
    CUT-THROUGH FORWARDING MODULE AND A METHOD OF RECEIVING AND TRANSMITTING DATA FRAMES IN A CUT-THROUGH FORWARDING MODE 有权
    切割通过前向模块的方法和一种以切割方式接收和发送数据框架的方法

    公开(公告)号:US20150117446A1

    公开(公告)日:2015-04-30

    申请号:US14395718

    申请日:2012-04-26

    申请人: Graham Edmiston

    发明人: Graham Edmiston

    IPC分类号: H04L12/947

    摘要: The disclosure relates to cut-through forwarding module, an integrated circuit, a semiconductor device and a method of receiving and transmitting data frames in a cut-through forwarding mode. The cut-through forwarding module processes received data frames in data blocks. The module comprises a pre-loading unit for storing a first data block of a received data frame. The stored first data block may be pre-loaded by the pre-loading unit in a transmitter unit before a receiver unit receives a subsequent data frame. The processing unit controls the transfer of a first data block to the pre-loading unit and controls the use of a pre-loaded data block as a first data block of a data frame to be transmitted.

    摘要翻译: 本公开涉及直通转发模块,集成电路,半导体装置和以切入转发模式接收和发送数据帧的方法。 直通转发模块处理数据块中的接收数据帧。 该模块包括用于存储接收到的数据帧的第一数据块的预加载单元。 存储的第一数据块可以在接收机单元接收到随后的数据帧之前由预加载单元在发射机单元中预加载。 处理单元控制第一数据块到预加载单元的传送,并且控制使用预加载的数据块作为要发送的数据帧的第一数据块。

    REAL-TIME DISTRIBUTED NETWORK MODULE, REAL-TIME DISTRIBUTED NETWORK AND METHOD THEREFOR
    4.
    发明申请
    REAL-TIME DISTRIBUTED NETWORK MODULE, REAL-TIME DISTRIBUTED NETWORK AND METHOD THEREFOR 有权
    实时分布式网络模块,实时分布式网络及其方法

    公开(公告)号:US20140233372A1

    公开(公告)日:2014-08-21

    申请号:US14348254

    申请日:2011-11-04

    IPC分类号: H04L12/24

    摘要: A real-time distributed network module arranged to provide an interface between at least one master application and at least one real-time distributed network. The real-time distributed network module comprises a first communications component arranged to transmit and receive real-time distributed network data over at least a first real-time distributed network connection, at least one further communications component arranged to transmit and receive real-time distributed network data over at least one further real-time distributed network connection at least one master application interface component arranged to provide an interface to the at least one master application, and at least one configuration component arranged to perform mapping of communication channels between the first communications component, the at least one further communications component and the at least one master application interface component. The at least one configuration component is further arranged to perform dynamic remapping of the communication channels between the first communications component, the at least one further communications component and the at least one master application interface, upon detection of a link failure within the real-time distributed network.

    摘要翻译: 布置成提供至少一个主应用与至少一个实时分布式网络之间的接口的实时分布式网络模块。 所述实时分布式网络模块包括被布置成通过至少第一实时分布式网络连接来发送和接收实时分布式网络数据的第一通信组件,布置成发送和接收实时分布式网络数据的至少一个另外的通信组件 通过至少一个另外的实时分布式网络连接的网络数据,布置成提供到所述至少一个主应用的接口的至少一个主应用接口组件以及被配置为执行第一通信之间的通信信道的映射的至少一个配置组件 组件,所述至少一个另外的通信组件和所述至少一个主应用程序接口组件。 所述至少一个配置组件还被布置成在检测到实时内的链路故障时,在第一通信组件,所述至少一个另外的通信组件和至少一个主应用接口之间执行通信信道的动态重新映射 分布式网络。

    INTEGRATED CIRCUIT DEVICE AND METHODS FOR PERFORMING CUT-THROUGH FORWARDING
    5.
    发明申请
    INTEGRATED CIRCUIT DEVICE AND METHODS FOR PERFORMING CUT-THROUGH FORWARDING 有权
    集成电路装置和执行切割切割的方法

    公开(公告)号:US20140029625A1

    公开(公告)日:2014-01-30

    申请号:US14007861

    申请日:2011-04-20

    申请人: Graham Edmiston

    发明人: Graham Edmiston

    IPC分类号: H04L12/863

    摘要: An integrated circuit device comprising at least one cut-through forwarding module. The cut-through forwarding module comprises at least one receiver component arranged to receive data to be forwarded, and to generate a request for transmission of a block of data upon receipt thereof, and at least one controller unit arranged to execute at least one thread for processing requests generated by the at least one receiver component. The at least one controller unit is arranged to set a priority context for the at least one thread, and to schedule an execution of the at least one thread based at least partly on the priority context therefor.

    摘要翻译: 一种包括至少一个直通转发模块的集成电路装置。 切入转发模块包括至少一个接收器组件,被布置为接收要转发的数据,并且在接收到数据块时产生对数据块的传输的请求,以及至少一个控制器单元,被配置为执行至少一个线程 处理由所述至少一个接收器组件产生的请求。 所述至少一个控制器单元被布置为至少部分地基于所述优先级上下文来设置所述至少一个线程的优先级上下文,并且调度所述至少一个线程的执行。

    METHOD, APPARATUS, AND SYSTEM FOR UNAMBIGUOUS PARAMETER SAMPLING IN A HETEROGENEOUS MULTI-CORE OR MULTI-THREADED PROCESSOR ENVIRONMENT
    7.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR UNAMBIGUOUS PARAMETER SAMPLING IN A HETEROGENEOUS MULTI-CORE OR MULTI-THREADED PROCESSOR ENVIRONMENT 有权
    异构多核或多线程处理器环境中不可比参数采样的方法,装置和系统

    公开(公告)号:US20160292014A1

    公开(公告)日:2016-10-06

    申请号:US14672596

    申请日:2015-03-30

    申请人: Graham Edmiston

    发明人: Graham Edmiston

    IPC分类号: G06F9/52 G06F9/48

    摘要: Apparatuses, methods, and systems are configured to perform unambiguous parameter sampling in a heterogeneous multi-core or multi-threaded environment by masking one or more thread requests; and, in response to bus activity ceasing for the one or more masked thread requests and completing any routine being processed for the one or more masked threads, processing a command by executing at least one of a command routine or a command thread, wherein the command routine or the command thread reads the parameter using thread atomicity with deterministic synchronization. One or more thread requests may be selected for masking by monitoring thread activity for each of a plurality of threads.

    摘要翻译: 设备,方法和系统被配置为通过掩蔽一个或多个线程请求来在异构多核或多线程环境中执行明确的参数采样; 并且响应于总线活动停止一个或多个屏蔽的线程请求并且完成针对一个或多个被屏蔽的线程正在处理的任何例程,通过执行命令例程或命令线程中的至少一个来处理命令,其中命令 例程或命令线程使用确定性同步的线程原子读取参数。 可以通过监视多个线程中的每个线程的线程活动来选择一个或多个线程请求以进行掩蔽。

    Error correction via lookup in compressed error location data
    8.
    发明授权
    Error correction via lookup in compressed error location data 有权
    通过在压缩错误位置数据中查找进行纠错

    公开(公告)号:US08560920B2

    公开(公告)日:2013-10-15

    申请号:US12444061

    申请日:2006-10-05

    IPC分类号: H03M13/00

    摘要: An error correction apparatus comprises an input for receiving data. The received data includes error-check data. The apparatus also includes a processing resource arranged to calculate parity check data. A data store is coupled to the processing resource for storing look-up data for identifying, when in use, a location of an error in the received data. The look-up data is a compressed form of indexed error location data.

    摘要翻译: 纠错装置包括用于接收数据的输入。 接收到的数据包括错误检查数据。 该装置还包括被配置为计算奇偶校验数据的处理资源。 数据存储器耦合到处理资源,用于存储查找数据,用于在使用时识别接收到的数据中的错误的位置。 查找数据是索引的错误位置数据的压缩形式。

    Method for processing ATM cells and a device having ATM cell processing capabilities
    9.
    发明授权
    Method for processing ATM cells and a device having ATM cell processing capabilities 有权
    用于处理ATM信元的方法和具有ATM信元处理能力的装置

    公开(公告)号:US08279877B2

    公开(公告)日:2012-10-02

    申请号:US12094573

    申请日:2005-11-22

    IPC分类号: H04L12/28 H04L12/56

    CPC分类号: H04L49/309 H04L12/5601

    摘要: A method and a communication device for processing ATM cells. The communication device includes an input interface adapted to receive an ATM cell that is associated with a PHY value and includes a pair of VCI and VPI fields. The communication device is characterized by comprising a search unit, adapted to search, within a group of memory entries that belong to a memory unit, for a pair of VCI and VPI fields that have values that match the values of the VCI and VPI fields of the received ATM cell, if the received VCI field and VPI fields belong to a first predefined group of VCI and VPI fields. The communication device further includes a processor, connected to the search unit, wherein the processor is adapted to determine a channel identifier of the received ATM cell in response to a result of the search and in response to a PHY value associated with the received ATM cell.

    摘要翻译: 一种用于处理ATM信元的方法和通信装置。 通信设备包括适于接收与PHY值相关联并包括一对VCI和VPI字段的ATM信元的输入接口。 通信设备的特征在于包括搜索单元,适于在属于存储器单元的一组存储器条目内搜索具有与VCI和VPI字段的值匹配的值的一对VCI和VPI字段 如果所接收的VCI字段和VPI字段属于VCI和VPI字段的第一预定义组,则接收到的ATM信元。 通信设备还包括连接到搜索单元的处理器,其中处理器适于响应于搜索的结果并且响应于与所接收的ATM信元相关联的PHY值来确定所接收的ATM信元的信道标识符 。

    Method and apparatus for implementing deterministic response frame transmission

    公开(公告)号:US10176012B2

    公开(公告)日:2019-01-08

    申请号:US14568298

    申请日:2014-12-12

    IPC分类号: G06F9/48 G06F9/54

    摘要: There is provided a network interface module, and a method of implementing deterministic response frame transmission therein. The network interface module comprises a processor core arranged to execute a set of threads, the set of threads comprising at least one transmit thread arranged to cause a response frame to be transmitted upon expiry of a minimum response period from a response triggering event occurring. The network interface module further comprises a timing component arranged to output a masking timeout signal indicating expiration of successive masking timeout intervals, and a masking component arranged to mask the transmit thread from being scheduled for execution by the processing core. The masking component being further arranged to receive the masking timeout signal output by the timing component and to unmask the transmit thread upon expiry of a masking timeout interval.