公开(公告)号：US20190079879A1

公开(公告)日：2019-03-14

申请号：US16156841

申请日：2018-10-10

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Mark A. Piwonka

IPC: G06F12/14 ,  G06F21/57 ,  G06F12/02 ,  G06F9/4401

Abstract: In some examples, a protected memory area inaccessible to an operating system stores information relating to instructions, where the protected memory area includes an indication settable to a first value to indicate that the instructions are allowed to access a memory external of the protected memory area, and a second value to indicate that the instructions are not allowed to access the memory external of the protected memory area. The indication is modified from the first value to the second value to restrict the instructions when executed from accessing the memory external of the protected memory area. In response to modifying the indication, code in the computing device is launched, the launched code comprising the operating system or firmware.

公开(公告)号：US10102154B2

公开(公告)日：2018-10-16

申请号：US15147761

申请日：2016-05-05

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Mark A. Piwonka

IPC: G06F12/00 ,  G06F12/14 ,  G06F12/02 ,  G06F21/57 ,  G06F9/4401

Abstract: In some examples, in response to a computing device powering on, a protected memory area inaccessible to an operating system is created, where the protected memory area includes information relating to instructions and an indication settable to a first value to indicate that the instructions are allowed to access a memory external of the protected memory area, and a second value to indicate that the instructions are not allowed to access the memory external of the protected memory area. In response to creating the protected memory area, the indication is modified from the first value to the second value to restrict the instructions when executed from accessing the memory external of the protected memory area. In response to modifying the indication, code in the computing device is launched, the launched code comprising the operating system or firmware.

公开(公告)号：US11762575B2

公开(公告)日：2023-09-19

申请号：US17419736

申请日：2019-07-31

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Mark A. Piwonka ,  Stanley Hyojun Park ,  Michael R. Durham ,  Ted T. Nguy

IPC: G06F3/06 ,  G06F8/654 ,  G06F12/0891

CPC classification number: G06F3/0652 ,  G06F3/0608 ,  G06F3/0679 ,  G06F8/654 ,  G06F12/0891 ,  G06F2212/1041 ,  G06F2212/222

Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

公开(公告)号：US20210157384A1

公开(公告)日：2021-05-27

申请号：US17045523

申请日：2018-07-20

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Mark A. Piwonka ,  Michael R. Durham ,  Scott W. Sanders ,  Javier Enrique Guerrero ,  Binh T. Truong

IPC: G06F1/3209 ,  G06F9/4401 ,  G06F1/3296 ,  G06F13/42

Abstract: Example implementations relate to assigning power sources. An example system includes a network device and a computing device with a BIOS. The BIOS provides the network device a heartbeat in response to the computing device entering a hibernation state, assigns a power source to a network interface card (NIC) of the network device via a power delivery controller, and assigns the NIC to receive Wake-On-Lan (WOL) support. The system can place the computing device to a threshold power state responsive to the NIC receiving WOL support.

公开(公告)号：US20190138074A1

公开(公告)日：2019-05-09

申请号：US16097824

申请日：2016-07-19

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Robert C Brooks ,  Michael R Durham ,  Mark A. Piwonka

IPC: G06F1/30 ,  G05F1/66 ,  G06F1/28

Abstract: Example systems relate to power monitoring and reduction processes. An example system may include a modular computing device including a plurality of universal serial bus (USB) ports and a power supply unit coupled to the modular computing device. The example system may further include an embedded controller coupled to the power supply unit and to the plurality of USB port. The embedded controller may monitor a level of power consumed by the system and determine whether a surge event has occurred in the system. In response to the determination that the surge event has occurred, the embedded controller may determine whether an agency event has occurred in the system and initiate a power reduction process in response to the determination.

公开(公告)号：US11507177B2

公开(公告)日：2022-11-22

申请号：US17419043

申请日：2019-05-17

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Robert C. Brooks ,  Michael R. Durham ,  Mark A. Piwonka ,  Jeffrey C. Stevens ,  Nam H. Nguyen

IPC: G06F1/32 ,  G06F1/3287

Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

公开(公告)号：US20220155990A1

公开(公告)日：2022-05-19

申请号：US17419736

申请日：2019-07-31

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Mark A. Piwonka ,  Stanley Hyojun Park ,  Michael R. Durham ,  Ted T. Nguy

IPC: G06F3/06 ,  G06F12/0891 ,  G06F8/654

Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

公开(公告)号：US20220075441A1

公开(公告)日：2022-03-10

申请号：US17419043

申请日：2019-05-17

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Robert C. Brooks ,  Michael R. Durham ,  Mark A. Piwonka ,  Jeffrey C. Stevens ,  Nam H. Nguyen

IPC: G06F1/3287

Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

公开(公告)号：US11262825B2

公开(公告)日：2022-03-01

申请号：US16179025

申请日：2018-11-02

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Michael R. Durham ,  Mark A. Piwonka

IPC: G06F1/26 ,  G06F1/28 ,  H01R13/66

Abstract: A circuit for identifying a power supply may include a voltage divider to divide an identification voltage from the power supply. The output of the voltage divider is electrically coupled to an adapter identification pin of a controller to identify the power supply.

公开(公告)号：US11204634B2

公开(公告)日：2021-12-21

申请号：US16097824

申请日：2016-07-19

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Robert C Brooks ,  Michael R Durham ,  Mark A. Piwonka

IPC: G06F1/30 ,  G05F1/66 ,  G06F1/28 ,  G01R19/165

Abstract: Example systems relate to power monitoring and reduction processes. An example system may include a modular computing device including a plurality of universal serial bus (USB) ports and a power supply unit coupled to the modular computing device. The example system may further include an embedded controller coupled to the power supply unit and to the plurality of USB port. The embedded controller may monitor a level of power consumed by the system and determine whether a surge event has occurred in the system. In response to the determination that the surge event has occurred, the embedded controller may determine whether an agency event has occurred in the system and initiate a power reduction process in response to the determination.