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    Input power scaling of power supply devices
    3.
    发明授权
    Input power scaling of power supply devices 有权

    公开(公告)号：US10976792B2

    公开(公告)日：2021-04-13

    申请号：US16083109

    申请日：2017-04-14

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Robert C. Brooks ,  Michael R. Durham ,  Christopher Woodbury

    IPC: G06F1/28 ,  G01R21/00

    Abstract: In one example in accordance with the present disclosure, a power management device is described. The power monitoring device includes an input line to receive input power information from a power supply device. The input power information is indicative of a level of input power from the power supply device. A controller of the power monitoring device determines a scaling amount of the input power information based on a power rating of the power supply device. A programmable scaling device scales the input power information based on the scaling amount to generate output information and an output line passes the output information to a set of recipient devices.

    Controller
    5.
    发明授权
    Controller 有权
    控制器

    公开(公告)号：US09275527B2

    公开(公告)日：2016-03-01

    申请号：US14499394

    申请日：2014-09-29

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Mark D. Tupa ,  Michael R. Durham ,  Christopher Rijken ,  Louis B. Hobson ,  Joshua N. McMahon

    IPC: G06F1/32 ,  G08B3/10 ,  G06F21/81

    CPC classification number: G08B3/10 ,  G06F1/3203 ,  G06F1/3206 ,  G06F21/81

    Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.

    Abstract translation: 第一控制器可以提供系统状态信息，第二控制器可以接收系统状态信息。 可以对第二个控制器进行编程，以控制组件的状态。 组件的状态可以基于在第二控制器中编程的信息和系统状态信息。 组件可以包括关闭状态和由来自第二控制器的信号指示的操作状态。

    Power management systems
    6.
    发明授权
    Power management systems 有权

    公开(公告)号：US11507177B2

    公开(公告)日：2022-11-22

    申请号：US17419043

    申请日：2019-05-17

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Robert C. Brooks ,  Michael R. Durham ,  Mark A. Piwonka ,  Jeffrey C. Stevens ,  Nam H. Nguyen

    IPC: G06F1/32 ,  G06F1/3287

    Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

    UPDATES TO FLASH MEMORY BASED ON DETERMINATIONS OF BITS TO ERASE
    7.
    发明申请
    UPDATES TO FLASH MEMORY BASED ON DETERMINATIONS OF BITS TO ERASE 有权

    公开(公告)号：US20220155990A1

    公开(公告)日：2022-05-19

    申请号：US17419736

    申请日：2019-07-31

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Mark A. Piwonka ,  Stanley Hyojun Park ,  Michael R. Durham ,  Ted T. Nguy

    IPC: G06F3/06 ,  G06F12/0891 ,  G06F8/654

    Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

    POWER MANAGEMENT SYSTEMS
    8.
    发明申请
    POWER MANAGEMENT SYSTEMS 有权

    公开(公告)号：US20220075441A1

    公开(公告)日：2022-03-10

    申请号：US17419043

    申请日：2019-05-17

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Robert C. Brooks ,  Michael R. Durham ,  Mark A. Piwonka ,  Jeffrey C. Stevens ,  Nam H. Nguyen

    IPC: G06F1/3287

    Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

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