公开(公告)号：US07955901B2

公开(公告)日：2011-06-07

申请号：US11867329

申请日：2007-10-04

申请人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

发明人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

IPC分类号： H01L23/48

CPC分类号： H01L23/3107 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/24 ,  H01L24/80 ,  H01L24/82 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24998 ,  H01L2224/32245 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.

摘要翻译： 公开了一种具有表面安装平坦的外部接触区域的功率半导体模块的制造方法。 至少一个功率半导体芯片由其后侧固定在漏极外部触点上。 绝缘层覆盖半导体芯片的侧边缘上方的顶侧，只要内壳平面离开半导体芯片的顶侧上的源极和栅极接触区域，并且还部分地释放出半导体芯片的顶侧 相应的外部联系人。

公开(公告)号：US20090093090A1

公开(公告)日：2009-04-09

申请号：US11867329

申请日：2007-10-04

申请人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

发明人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

IPC分类号： H01L21/56

CPC分类号： H01L23/3107 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/24 ,  H01L24/80 ,  H01L24/82 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24998 ,  H01L2224/32245 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.

摘要翻译： 公开了一种具有表面安装平坦的外部接触区域的功率半导体模块的制造方法。 至少一个功率半导体芯片由其后侧固定在漏极外部触点上。 绝缘层覆盖半导体芯片的侧边缘上方的顶侧，只要内壳平面离开半导体芯片的顶侧上的源极和栅极接触区域，并且还部分地释放出半导体芯片的顶侧 相应的外部联系人。

公开(公告)号：US20080061449A1

公开(公告)日：2008-03-13

申请号：US11851397

申请日：2007-09-07

申请人： Joachim Mahler ,  Thomas Behrens ,  Reimund Engl ,  Khalil Hosseini ,  Stefan Landau ,  Boris Plikat

发明人： Joachim Mahler ,  Thomas Behrens ,  Reimund Engl ,  Khalil Hosseini ,  Stefan Landau ,  Boris Plikat

IPC分类号： H01L23/12 ,  H01L21/66

CPC分类号： H01L23/12 ,  H01L24/83 ,  H01L2224/83 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor component arrangement having a semiconductor component, a mount, and an adhesive, wherein the adhesive connects the semiconductor component to the mount and the adhesive contains a marker substance. Also disclosed is a method for inspecting the connection of a semiconductor component to a mount. The semiconductor component is fixed on the mount using an adhesive, wherein the adhesive contains a marker substance, the mount with the semiconductor component is cleaned, and the mount is inspected for residues of the adhesive on the basis of radiation which is characteristic of the marker substance.

摘要翻译： 具有半导体部件，安装件和粘合剂的半导体部件布置，其中所述粘合剂将所述半导体部件连接到所述安装件，并且所述粘合剂包含标记物质。 还公开了一种用于检查半导体部件到安装座的连接的方法。 使用粘合剂将半导体部件固定在安装件上，其中粘合剂包含标记物质，清洁具有半导体部件的安装件，并且基于作为标记特征的辐射来检查安装件的粘合剂残留物 物质。

公开(公告)号：US20130341780A1

公开(公告)日：2013-12-26

申请号：US13527668

申请日：2012-06-20

申请人： Thorsten Scharf ,  Boris Plikat ,  Henrik Ewe ,  Anton Prueckl ,  Stefan Landau

发明人： Thorsten Scharf ,  Boris Plikat ,  Henrik Ewe ,  Anton Prueckl ,  Stefan Landau

IPC分类号： H01L23/48 ,  H01L21/60 ,  H01L23/495

CPC分类号： H01L24/82 ,  H01L23/295 ,  H01L23/3171 ,  H01L23/3735 ,  H01L23/49562 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/2413 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29166 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/8382 ,  H01L2224/92244 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/15747 ,  H01L2924/00

摘要： A chip arrangement is provided. The chip arrangement including: a chip including at least one electrically conductive contact; a passivation material formed over the at least one electrically conductive contact; an encapsulation material formed over the passivation material; one or more holes formed through the encapsulation material and the passivation material, wherein the passivation material at least partially surrounds the one or more holes; and electrically conductive material provided within the one or more holes, wherein the electrically conductive material is electrically connected to the at least one electrically conductive contact.

摘要翻译： 提供了芯片布置。 芯片布置包括：包括至少一个导电触点的芯片; 形成在所述至少一个导电触点上的钝化材料; 形成在钝化材料上的封装材料; 通过所述封装材料和所述钝化材料形成的一个或多个孔，其中所述钝化材料至少部分地围绕所述一个或多个孔; 以及设置在所述一个或多个孔内的导电材料，其中所述导电材料电连接到所述至少一个导电触点。