Abstract:
A semiconductor device and method is disclosed. One embodiment provides a method comprising placing a first semiconductor chip on a carrier. After placing the first semiconductor chip on the carrier, an electrically insulating layer is deposited on the carrier. A second semiconductor chip is placed on the electrically insulating layer.
Abstract:
A semiconductor device includes a carrier, a semiconductor chip including an active area on a first face and a separate isolation layer applied to a second face, and an adhesion material coupling the isolation layer to the carrier with the second face facing the carrier.
Abstract:
A semiconductor device includes a carrier, a semiconductor chip including an active area on a first face and a separate isolation layer applied to a second face, and an adhesion material coupling the isolation layer to the carrier with the second face facing the carrier.
Abstract:
A semiconductor device is disclosed. One embodiment provides a device including a carrier, an electrically insulating layer applied onto the carrier, an adhesive layer applied to the electrically insulating layer. A first semiconductor chip applied to the adhesive layer.
Abstract:
A semiconductor module is disclosed. One embodiment provides a first semiconductor chip, a second semiconductor chip and a spacer. The first semiconductor chip has a depression at a first main surface. The spacer applied to the first main surface and at least partly fills the depression. The second semiconductor chip is applied to the spacer.
Abstract:
A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.
Abstract:
A semiconductor device is disclosed. One embodiment provides a device including a carrier, an electrically insulating layer applied onto the carrier, an adhesive layer applied to the electrically insulating layer. A first semiconductor chip applied to the adhesive layer.
Abstract:
A memory cell reversibly switchable between different stable electrical resistance states, the memory cell having a first electrode and a second electrode and an active layer arranged between the first and the second electrode, the active layer including a compound represented by general formula , wherein R1 and R2 are independently selected from —H, —(CH2)mCH3, -phenyl, —O—(CH2)mCH3, —O-phenyl, —S(CH2)mCH3, —S-aryl, —NR3R4, —SR3 and -halogen; R1 and R2 may together form a ring; R5 and R6 are independently selected from —H, -alkyl, -aryl and -heteroaryl; m is either 0 or an integer ranging from 1 to 10; n is an integer ranging from 2 to 1000; and a compound represented by general formula wherein R7, R8, R9, R10, R11, R12, R13, and R14 are independently selected from the group consisting of —H, —(CH2)mCH3, -phenyl, —O—(CH2)mCH3, —O-phenyl, —CO(CH2)mCH3, -halogen, —CN and —NO2; R7 and R8 may together form a ring; R8 and R9 may together form a ring; R9 and R10 may together form a ring; R11 and R12 may together form a ring; R12 and R13 may together form a ring; and R13 and R14 may together form a ring.Furthermore, a process for the production of the cells according to the invention is provided, as well as the novel use of a composition which can be used as active material for the memory cells.
Abstract:
A memory cell is provided which comprises two electrodes and a layer arranged in between and comprising an active material comprising (a) a compound selected from the group consisting of in which R1 and R4, independently of one another, may have the following meaning: —H, -alkyl, -aryl, -heteroaryl, —O-alkyl, —O-aryl, —O-heteroaryl, —SH, —S-alkyl, —S-aryl, —S-heteroaryl, —CO-alkyl, —CO-aryl, —CO-heteroaryl, —CS-alkyl, —CS-aryl, —CS-heteroaryl, -halogen, —CN and/or —NO2, in which R1 and R2, R2 and R3, R3 and R4 together may form a ring, (b) a compound of the general formula II: in which R5 to R7, independently of one another, may have the following meaning: —H, -alkyl, -aryl, -heteroaryl, —O-alkyl, —O-aryl, —O-heteroaryl, —NH2, —N(alkyl)2, —N(aryl)2, —N(heteroaryl)2, —SH, —S-alkyl, —S-aryl, —S-heteroaryl, —CO-alkyl, —CO-aryl, —CO-heteroaryl, —CS-alkyl, —CS-aryl, —CS-heteroaryl, -halogen, —CN and/or —NO2, in which R5 and R6 or R7 and R8 together may form a ring, and optionally (c) a polymer. A method for the production of the cells according to the invention and the novel use of a composition which can be used as active material for the memory cells are furthermore provided.
Abstract:
Polymers are described which exhibit a resistive hysteresis effect. The polymers include a polymer backbone to which pentaarylcyclopentadienyl radicals are bonded as side groups. A resistive memory element is formed that includes the polymer as a storage medium. By applying a voltage, the memory element can be switched between a nonconductive and a conductive state.