Power semiconductor module having surface-mountable flat external contacts and method for producing the same
    4.
    发明申请
    Power semiconductor module having surface-mountable flat external contacts and method for producing the same 有权
    功率半导体模块,具有表面安装平坦的外部触头及其制造方法

    公开(公告)号:US20070246808A1

    公开(公告)日:2007-10-25

    申请号:US11376871

    申请日:2006-03-16

    IPC分类号: H01L23/498 H01L21/02

    摘要: Power semiconductor module comprising surface-mountable flat external contact areas and method for producing the same The invention relates to a power semiconductor module (1) comprising surface-mountable flat external contact areas (3) and a method for producing the same. The top sides (10) of the external contacts (3) form an inner housing plane (11), on which at least one power semiconductor chip (6) is fixed by its rear side (8) on a drain external contact (13). An insulation layer (14) covers the top side (7) over the edge sides (15 to 18) of the semiconductor chip (6) as far as the inner housing plane (11) whilst leaving free the source and gate contact areas on the top side (7) of the semiconductor chip (6) and also whilst partly leaving free the top sides (10) of the corresponding external contacts (19 and 20). Arranged on said insulation layer (14) is a connecting conductive layer between the source contact areas on the top side (7) of the semiconductor chip (6) and the top sides (10) of the source external contacts (19), and also a gate connecting layer (22) from the gate contact areas (24) to the top side (10) of the gate external contact (20).

    摘要翻译: 包括可表面安装的平坦外部接触区域的功率半导体模块及其制造方法技术领域本发明涉及一种功率半导体模块(1),其包括可表面安装的平坦的外部接触区域(3)及其制造方法。 外部触点(3)的顶面(10)形成内部壳体平面(11),至少一个功率半导体芯片(6)通过其后侧(8)固定在漏极外部触点(13)上, 。 绝缘层(14)将半导体芯片(6)的边缘侧(15至18)上的顶侧(7)覆盖到内部壳体平面(11),同时释放源极和栅极接触区域 半导体芯片(6)的顶侧(7)并且同时部分地释放对应的外部触点(19和20)的顶侧(10)。 布置在所述绝缘层(14)上的是在半导体芯片(6)的顶侧(7)和源极外部触点(19)的顶侧(10)之间的源极接触区域之间的连接导电层,以及 从栅极接触区域(24)到栅极外部接触件(20)的顶侧(10)的栅极连接层(22)。