-
Patent Agency Ranking
公开(公告)号：US20170185315A1
公开(公告)日：2017-06-29
申请号：US14757926
申请日：2015-12-23
Applicant: INTEL CORPORATION
Inventor： Vedaraman Geetha , Henk G. Neefs , Brian S. Morris , Sreenivas Mandava , Massimo Sutera
CPC classification number: G06F3/0611 , G06F3/0638 , G06F3/068 , G06F12/0866 , G06F12/0893 , G06F2212/1021 , G06F2212/205 , G06F2212/2532 , G06F2212/45 , G06F2212/60
Abstract: Provided are an apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device having a 2n cache size. A request is to a target address having n bits directed to the second level memory device. A determination is made whether a target index, comprising m bits of the n bits of the target address, is within an index set of the first level memory device. A determination is made of a modified target index in the index set of the first level memory device having at least one index bit that differs from a corresponding at least one index bit in the target index. The request is processed with respect to data in a cache line at the modified target index in the first level memory device.
-
公开(公告)号：US10042562B2
公开(公告)日：2018-08-07
申请号：US15684936
申请日：2017-08-23
Applicant: INTEL CORPORATION
Inventor： Vedaraman Geetha , Henk G. Neefs , Brian S. Morris , Sreenivas Mandava , Massimo Sutera
IPC: G06F12/00 , G06F3/06 , G06F12/0866 , G06F12/0893
Abstract: Provided are an apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device having a 2n cache size. A request is to a target address having n bits directed to the second level memory device. A determination is made whether a target index, comprising m bits of the n bits of the target address, is within an index set of the first level memory device. A determination is made of a modified target index in the index set of the first level memory device having at least one index bit that differs from a corresponding at least one index bit in the target index. The request is processed with respect to data in a cache line at the modified target index in the first level memory device.
-
公开(公告)号：US09747041B2
公开(公告)日：2017-08-29
申请号：US14757926
申请日：2015-12-23
Applicant: INTEL CORPORATION
Inventor： Vedaraman Geetha , Henk G. Neefs , Brian S. Morris , Sreenivas Mandava , Massimo Sutera
IPC: G06F12/00 , G06F3/06 , G06F12/0893 , G06F12/0866
CPC classification number: G06F3/0611 , G06F3/0638 , G06F3/068 , G06F12/0866 , G06F12/0893 , G06F2212/1021 , G06F2212/205 , G06F2212/2532 , G06F2212/45 , G06F2212/60
Abstract: Provided are an apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device having a 2n cache size. A request is to a target address having n bits directed to the second level memory device. A determination is made whether a target index, comprising m bits of the n bits of the target address, is within an index set of the first level memory device. A determination is made of a modified target index in the index set of the first level memory device having at least one index bit that differs from a corresponding at least one index bit in the target index. The request is processed with respect to data in a cache line at the modified target index in the first level memory device.
-
4.发明授权Extending a cache coherency snoop broadcast protocol with directory information 有权扩展具有目录信息的缓存一致性侦听广播协议公开(公告)号：US09298629B2
公开(公告)日：2016-03-29
申请号：US14549874
申请日：2014-11-21
Applicant: INTEL CORPORATION
Inventor： Sailesh Kottapalli , Henk G. Neefs , Rahul Pal , Manoj K. Arora , Dheemanth Nagaraj
CPC classification number: G06F12/0833 , G06F12/0817 , G06F12/0822 , G06F12/0831 , G06F12/084 , G06F13/4265 , G06F2212/621 , G06F2212/622
Abstract: In one embodiment, a method includes receiving a read request from a first caching agent, determining whether a directory entry associated with the memory location indicates that the information is not present in a remote caching agent, and if so, transmitting the information from the memory location to the first caching agent before snoop processing with respect to the read request is completed. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，一种方法包括从第一高速缓存代理接收读取请求，确定与存储器位置相关联的目录条目是否指示该信息不存在于远程高速缓存代理中，如果是，则将该信息从存储器 关于读取请求的窥探处理之前的第一高速缓存代理的位置被完成。 描述和要求保护其他实施例。
-
5.发明授权Extending a cache coherency snoop broadcast protocol with directory information 有权扩展具有目录信息的缓存一致性侦听广播协议公开(公告)号：US08918592B2
公开(公告)日：2014-12-23
申请号：US14142044
申请日：2013-12-27
Applicant: Intel Corporation
Inventor： Sailesh Kottapalli , Henk G. Neefs , Rahul Pal , Manoj K. Arora , Dheemanth Nagaraj
CPC classification number: G06F12/0833 , G06F12/0817 , G06F12/0822 , G06F12/0831 , G06F12/084 , G06F13/4265 , G06F2212/621 , G06F2212/622
Abstract: In one embodiment, a method includes receiving a read request from a first caching agent, determining whether a directory entry associated with the memory location indicates that the information is not present in a remote caching agent, and if so, transmitting the information from the memory location to the first caching agent before snoop processing with respect to the read request is completed. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，一种方法包括从第一高速缓存代理接收读取请求，确定与存储器位置相关联的目录条目是否指示该信息不存在于远程高速缓存代理中，如果是，则将该信息从存储器 关于读取请求的窥探处理之前的第一高速缓存代理的位置被完成。 描述和要求保护其他实施例。
-
-
-
-
Search Results
5
records
(took 0.011 seconds)
