公开(公告)号：US11121073B2

公开(公告)日：2021-09-14

申请号：US15943565

申请日：2018-04-02

Applicant: Intel Corporation

Inventor： Travis Lajoie ,  Abhishek Sharma ,  Juan Alzate-Vinasco ,  Chieh-Jen Ku ,  Shem Ogadhoh ,  Allen Gardiner ,  Blake Lin ,  Yih Wang ,  Pei-Hua Wang ,  Jack T. Kavalieros ,  Bernhard Sell ,  Tahir Ghani

IPC: H01L23/522 ,  H01L49/02 ,  H01L27/108 ,  H01L23/532

Abstract: An interconnect structure is disclosed. The interconnect structure includes a first metal interconnect in a bottom dielectric layer, a via that extends through a top dielectric layer, a metal plate, an intermediate dielectric layer, and an etch stop layer, and a metal in the via to extend through the top dielectric layer, the metal plate, the intermediate dielectric layer and the etch stop layer to the top surface of the first metal interconnect. The metal plate is coupled to an MIM capacitor that is parallel to the via. The second metal interconnect is on top of the metal in the via.

公开(公告)号：US20150348623A1

公开(公告)日：2015-12-03

申请号：US14290623

申请日：2014-05-29

Applicant: Intel Corporation

Inventor： Blake Lin ,  Cyrille Dray ,  Ananda Roy ,  Liqiong Wei ,  Faith Hamzaoglu

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C11/1675 ,  G11C11/1677 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0057 ,  G11C2013/0066 ,  G11C2013/0078

Abstract: Described are apparatuses and methods for improving resistive memory energy efficiency and reliability. An apparatus may include a resistive memory cell coupled to a conductive line. The apparatus may further include a driver coupled to the conductive line to drive current for the resistive memory cell during a write operation. The resistance of the driver may be selectively increased for two or more time periods during the write operation for detecting a voltage change on the conductive line. The current for the write operation may be turned off when the voltage change is detected to improve resistive memory energy efficiency and reliability.

Abstract translation: 描述了用于提高电阻式存储器能量效率和可靠性的装置和方法。 一种装置可以包括耦合到导线的电阻式存储单元。 该装置还可以包括耦合到导线的驱动器，以在写操作期间驱动电阻性存储单元的电流。 在用于检测导线上的电压变化的写入操作期间，可以选择性地增加驱动器的电阻两个或更多个时间段。 当检测到电压变化以提高电阻性存储器的能量效率和可靠性时，用于写入操作的电流可以被关闭。

公开(公告)号：US12176284B2

公开(公告)日：2024-12-24

申请号：US17398933

申请日：2021-08-10

Applicant: Intel Corporation

Inventor： Travis Lajoie ,  Abhishek Sharma ,  Juan Alzate-Vinasco ,  Chieh-Jen Ku ,  Shem Ogadhoh ,  Allen Gardiner ,  Blake Lin ,  Yih Wang ,  Pei-Hua Wang ,  Jack T. Kavalieros ,  Bernhard Sell ,  Tahir Ghani

IPC: H01L23/522 ,  H01L23/532 ,  H01L49/02 ,  H10B12/00

Abstract: An interconnect structure is disclosed. The interconnect structure includes a first metal interconnect in a bottom dielectric layer, a via that extends through a top dielectric layer, a metal plate, an intermediate dielectric layer, and an etch stop layer, and a metal in the via to extend through the top dielectric layer, the metal plate, the intermediate dielectric layer and the etch stop layer to the top surface of the first metal interconnect. The metal plate is coupled to an MIM capacitor that is parallel to the via. The second metal interconnect is on top of the metal in the via.

公开(公告)号：US09286976B2

公开(公告)日：2016-03-15

申请号：US14290623

申请日：2014-05-29

Applicant: Intel Corporation

Inventor： Blake Lin ,  Cyrille Dray ,  Ananda Roy ,  Liqiong Wei ,  Fatih Hamzaoglu

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/004 ,  G11C11/1675 ,  G11C11/1677 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0057 ,  G11C2013/0066 ,  G11C2013/0078

Abstract: Described are apparatuses and methods for improving resistive memory energy efficiency and reliability. An apparatus may include a resistive memory cell coupled to a conductive line. The apparatus may further include a driver coupled to the conductive line to drive current for the resistive memory cell during a write operation. The resistance of the driver may be selectively increased for two or more time periods during the write operation for detecting a voltage change on the conductive line. The current for the write operation may be turned off when the voltage change is detected to improve resistive memory energy efficiency and reliability.

Abstract translation: 描述了用于提高电阻式存储器能量效率和可靠性的装置和方法。 一种装置可以包括耦合到导线的电阻式存储单元。 该装置还可以包括耦合到导线的驱动器，以在写操作期间驱动电阻性存储单元的电流。 在用于检测导线上的电压变化的写入操作期间，可以选择性地增加驱动器的电阻两个或更多个时间段。 当检测到电压变化以提高电阻性存储器的能量效率和可靠性时，用于写入操作的电流可以被关闭。