公开(公告)号：US20230333738A1

公开(公告)日：2023-10-19

申请号：US18142942

申请日：2023-05-03

Applicant: Intel Corporation

Inventor： Rasika Subramanian ,  Lidia Warnes ,  Francesc Guim Bernat ,  Mark A. Schmisseur ,  Durgesh Srivastava

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0631 ,  G06F3/0665 ,  G06F3/0673

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.

公开(公告)号：US11681439B2

公开(公告)日：2023-06-20

申请号：US16914124

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Rasika Subramanian ,  Lidia Warnes ,  Francesc Guim Bernat ,  Mark A. Schmisseur ,  Durgesh Srivastava

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0631 ,  G06F3/0665 ,  G06F3/0673

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.

公开(公告)号：US20220004500A1

公开(公告)日：2022-01-06

申请号：US17479702

申请日：2021-09-20

Applicant: Intel Corporation

Inventor： Francois Dugast ,  Neha Pathapati ,  Durgesh Srivastava

IPC: G06F12/1009 ,  G06F12/02 ,  G06F12/0882 ,  G06F12/0831

Abstract: An apparatus of a computing system, the computing system, a method to be performed at the apparatus, and a machine-readable storage medium. The apparatus includes control circuitry to: perform a page walk operation on a page table structure of a pooled memory; based on the page walk operation, determine page table entries (PTEs) corresponding to a workload to be executed by the computing system; and during a time interval not including a page walk operation by the control circuitry, perform a plurality of sampling operations, individual ones of the sampling operations including determining PTE metadata corresponding to at least some of the PTEs.

公开(公告)号：US11726565B2

公开(公告)日：2023-08-15

申请号：US17872813

申请日：2022-07-25

Applicant: Intel Corporation

Inventor： Dhaval V. Sharma ,  Nivruti Rai ,  Durgesh Srivastava ,  Shobhit Kumar

IPC: G06F3/01 ,  G09G3/34 ,  G09G5/10 ,  G06F1/3231 ,  G06F1/3296

CPC classification number: G06F3/013 ,  G06F1/3231 ,  G06F1/3296 ,  G09G3/3406 ,  G09G3/3426 ,  G09G5/10 ,  G09G2320/0646 ,  G09G2320/0686 ,  G09G2320/10 ,  G09G2330/021 ,  G09G2354/00 ,  G09G2360/144 ,  G09G2380/14

Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. An example backlight controller for selective backlight control of a monitor includes interface circuitry, memory, machine-readable instructions, and processor circuitry to execute the machine readable instructions to obtain a user display context relative to the monitor, the user display context based on sensor data, the sensor data to include user proximity data; determine whether to enable or disable the selective backlighting for the monitor based on the user display context; cause first backlight sections of the monitor to output at a first light intensity based on the user display context; and cause second backlight sections of the monitor to output at least one of (a) the first light intensity or (b) a second light intensity that is different than the first light intensity based on the determination.

公开(公告)号：US11573722B2

公开(公告)日：2023-02-07

申请号：US16987057

申请日：2020-08-06

Applicant: Intel Corporation

Inventor： Rasika Subramanian ,  Lidia Warnes ,  Francesc Guim Bernat ,  Mark A. Schmisseur ,  Durgesh Srivastava

IPC: G06F3/06

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to provide an interface to a pooled memory that is configured as a combination of local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, allocate respective memory portions of the pooled memory to respective tenants, associate respective memory balloons with the respective tenants that correspond to the allocated respective memory portions, and manage the respective memory balloons based on the respective tenants and two or more memory tiers associated with the pooled memory. Other embodiments are disclosed and claimed.

公开(公告)号：US10976815B2

公开(公告)日：2021-04-13

申请号：US16443661

申请日：2019-06-17

Applicant: Intel Corporation

Inventor： Dhaval V. Sharma ,  Nivruti Rai ,  Durgesh Srivastava ,  Shobhit Kumar

IPC: G06F3/01 ,  G09G3/34 ,  G09G5/10 ,  G06F1/3231 ,  G06F1/3296

Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. The user display context represents an area of interest on the monitor. The user display context can be based on eye tracking data, ambient light data, motion sensing data, cursor location in the display space, an image content, proximity data, or the like and any combination thereof. A first set of one or more of a plurality of backlight sections corresponding to the determined focal point of the display space can be driven to output at a first intensity level, while a second set of one or more of the plurality of backlight sections can be driven to output at a second intensity level.

公开(公告)号：US20190302885A1

公开(公告)日：2019-10-03

申请号：US16443661

申请日：2019-06-17

Applicant: Intel Corporation

Inventor： Dhaval V. Sharma ,  Nivruti Rai ,  Durgesh Srivastava ,  Shobhit Kumar

IPC: G06F3/01 ,  G09G3/34 ,  G09G5/10 ,  G06F1/3231 ,  G06F1/3296

Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. The user display context represents an area of interest on the monitor. The user display context can be based on eye tracking data, ambient light data, motion sensing data, cursor location in the display space, an image content, proximity data, or the like and any combination thereof. A first set of one or more of a plurality of backlight sections corresponding to the determined focal point of the display space can be driven to output at a first intensity level, while a second set of one or more of the plurality of backlight sections can be driven to output at a second intensity level.

公开(公告)号：US12192024B2

公开(公告)日：2025-01-07

申请号：US17103711

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Bassam N. Coury ,  Sujoy Sen ,  Thomas E. Willis ,  Durgesh Srivastava

IPC: H04L12/18 ,  G06F12/02 ,  G06F12/0813 ,  G06F12/0837 ,  G06F12/0862 ,  G06F12/0877 ,  G06F12/0891 ,  G06F12/1081 ,  G06F13/16 ,  G06F13/28 ,  G06F13/40 ,  H04L12/54 ,  H04L45/74 ,  H04L49/201 ,  H04L67/1095 ,  H04L12/70

Abstract: Examples described herein includes a network interface controller comprising a memory interface and a network interface, the network interface controller configurable to provide access to local memory and remote memory to a requester, wherein the network interface controller is configured with an amount of memory of different memory access speeds for allocation to one or more requesters. In some examples, the network interface controller is to grant or deny a memory allocation request from a requester based on a configuration of an amount of memory for different memory access speeds for allocation to the requester. In some examples, the network interface controller is to grant or deny a memory access request from a requester based on a configuration of memory allocated to the requester. In some examples, the network interface controller is to regulate quality of service of memory access requests from requesters.

公开(公告)号：US12192023B2

公开(公告)日：2025-01-07

申请号：US17103602

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Sujoy Sen ,  Durgesh Srivastava ,  Thomas E. Willis ,  Bassam N. Coury ,  Marcelo Cintra

IPC: H04L12/18 ,  G06F12/02 ,  G06F12/0813 ,  G06F12/0837 ,  G06F12/0862 ,  G06F12/0877 ,  G06F12/0891 ,  G06F12/1081 ,  G06F13/16 ,  G06F13/28 ,  G06F13/40 ,  H04L12/54 ,  H04L45/74 ,  H04L49/201 ,  H04L67/1095 ,  H04L12/70

Abstract: Examples described herein and includes at least one processor and a direct memory access (DMA) device. In some examples, the DMA device is to: access a command from a memory region allocated to receive commands for execution by the DMA device, wherein the command is to access content from a local memory device or remote memory node. In some examples, the DMA device is to: determine if the content is stored in a local memory device or a remote memory node based on a configuration that indicates whether a source address refers to a memory address associated with the local memory device or the remote memory node and whether a destination address refers to a memory address associated with the local memory device or the remote memory node. In some examples, the DMA device is to: copy the content from a local memory device or copy the content to the local memory device using a memory interface.

公开(公告)号：US12132581B2

公开(公告)日：2024-10-29

申请号：US17103802

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Sujoy Sen ,  Durgesh Srivastava ,  Thomas E. Willis ,  Bassam N. Coury ,  Marcelo Cintra

IPC: H04L12/18 ,  G06F12/02 ,  G06F12/0813 ,  G06F12/0837 ,  G06F12/0862 ,  G06F12/0877 ,  G06F12/0891 ,  G06F12/1081 ,  G06F13/16 ,  G06F13/28 ,  G06F13/40 ,  H04L12/54 ,  H04L45/74 ,  H04L49/201 ,  H04L67/1095 ,  H04L12/70

CPC classification number: H04L12/1868 ,  G06F12/0238 ,  G06F12/0813 ,  G06F12/0837 ,  G06F12/0862 ,  G06F12/0877 ,  G06F12/0891 ,  G06F12/1081 ,  G06F13/1689 ,  G06F13/28 ,  G06F13/4059 ,  H04L12/5601 ,  H04L45/74 ,  H04L49/201 ,  H04L67/1095 ,  G06F2213/28 ,  H04L2012/562

Abstract: Examples described herein includes an apparatus comprising: a network interface configured to: receive a request to copy data from a local memory to a remote memory; based on a configuration that the network interface is to manage a cache store the data into the cache and record that the data is stored in the cache. In some examples, store the data in the cache comprises store most recently evicted data from the local memory into the cache. In some examples, the network interface is to store data evicted from the local memory that is not stored into the cache into one or more remote memories.