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公开(公告)号：US10389851B2
公开(公告)日：2019-08-20
申请号：US14856865
申请日：2015-09-17
Applicant: Intel Corporation
Inventor： Krishna Kumar Ganesan , Sudhakar Otturu , Nicholas J. Adams
IPC: G06F1/00 , G06F1/26 , H04L29/08 , G06F21/57 , G06F1/3206 , H04L29/06 , H04W52/02 , G06F8/654 , G06F1/3234 , G06F1/3287
Abstract: In one embodiment, a system includes a display, a non-volatile memory to store one or more system software images, a processor to execute at least one of the one or more system software images, and a security engine to perform security applications. The security engine may include a first logic to receive a download package from a host computing system and store the download package in a first memory, authenticate the download package, and execute the download package to download and store a first system software image into the non-volatile memory. In addition, a second logic of the system may be configured to disable at least the display during the first system software image download and store. Other embodiments are described and claimed.
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公开(公告)号：US10282538B2
公开(公告)日：2019-05-07
申请号：US14583656
申请日：2014-12-27
Applicant: Intel Corporation
Inventor： Sudhakar Otturu , Krishna Kumar Ganesan , Erik Holt
Abstract: Technologies to enable, disable and control hardware subscription features. Computing devices communicate over a network to a subscription server to provide hardware platform information for each of the computing devices. As the subscription server receives hardware platform information, the subscription server determines the hardware features that are enabled, and further determines what hardware subscription options are available for each of the computing devices. When a hardware subscription option is selected/purchased by a computing device, subscription server provides a pre-boot update mechanism, such as a Unified Extensible Firmware Interface (UEFI) capsule, to act as a boot level program that enables hardware features on the computing device. Hardware subscription features are also securely protected using cryptographic engine modules.
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公开(公告)号：US10733077B2
公开(公告)日：2020-08-04
申请号：US15856427
申请日：2017-12-28
Applicant: INTEL CORPORATION
Inventor： Sankaran Menon , Krishna Kumar Ganesan , Rolf Kuehnis , Eija Maarit Hillevi Manninen
Abstract: Techniques and apparatus for error and performance analysis of a computing device are described. In one embodiment, for example, an apparatus may include at least one memory and logic coupled to the at least one memory, wherein the logic is further to access at least one trace associated with at least one trace source, access timing information associated with the at least one trace, generate a plurality of waypoints for at least one trace, each of the plurality of waypoints comprising a step of at least one trace and a time stamp, and generate at least one performance benchmark log for the at least one trace, the at least one benchmark log comprising a plurality of benchmark waypoints corresponding to the plurality of waypoints.
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公开(公告)号：US09904349B2
公开(公告)日：2018-02-27
申请号：US14671721
申请日：2015-03-27
Applicant: Intel Corporation
Inventor： Pronay Dutta , Krishna Kumar Ganesan
CPC classification number: G06F1/3287 , G06F1/3206 , G06F1/3209 , G06F9/4418 , Y02D10/171 , Y02D10/44 , Y02D50/20
Abstract: Technologies for managing the power usage of components of a computing device, while the components and the computing device are in a low-power state, such as a connected standby state. An embedded controller includes a wake-up timer designed to wake up the embedded controller during a low-power state to allow the embedded controller to perform its tasks. A power control system is configured to dynamically alter the timing cycle of the wake-up timer of the embodied controller based on operation data received. The dynamically altered timing cycle is designed to conserve power, but maintain functionality of the embedded controller.
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公开(公告)号：US10180800B2
公开(公告)日：2019-01-15
申请号：US15448380
申请日：2017-03-02
Applicant: Intel Corporation
Inventor： Karunakara Kotary , Krishna Kumar Ganesan , Vincent J. Zimmer
IPC: G06F3/06 , H04L9/32 , G06F12/14 , G06F21/57 , G06F9/4401
Abstract: Systems, apparatuses and methods may include technology that detects a migration request and conducts a first transfer, via a trusted execution environment (TEE), of storage context information from a first removable storage device to a secure memory region of a system in response to the data migration request. Additionally, the technology may conduct a second transfer, via the TEE, of the storage context information from the secure memory region to a second removable storage device, wherein the storage context information includes factory data, security data and boot firmware.
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Patent Agency Ranking
公开(公告)号：US09996142B2
公开(公告)日：2018-06-12
申请号：US14915353
申请日：2013-10-31
Applicant: Intel Corporation
Inventor： Mallik Bulusu , Vincent J. Zimmer , Krishna Kumar Ganesan
CPC classification number: G06F1/3287 , G06F1/3234 , G06F8/654 , G06F8/656 , G06F9/4401 , G06F9/4411 , Y02D10/171 , Y02D10/40 , Y02D10/42
Abstract: Technologies for updating firmware in a pre-boot environment include a mobile computing device having a firmware environment and an operating system. In the pre-boot environment, the mobile computing device extracts a firmware update from a capsule previously generated by the operating system and determines a power consumption setting for a hardware component as a function of the firmware update. The mobile computing device configures the hardware component based on the power consumption setting and applies the firmware update in response to configuring the hardware component. The firmware update may include a firmware driver executable in the firmware environment. The hardware component may include a peripheral device or a device controller of the mobile computing device. The mobile computing device may determine a power policy as a function of the firmware update, and determine the power consumption setting as a function of the power policy. Other embodiments are described and claimed.
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公开(公告)号：US10394654B2
公开(公告)日：2019-08-27
申请号：US15475941
申请日：2017-03-31
Applicant: Intel Corporation
Inventor： Krishna Kumar Ganesan , Karunakara Kotary
IPC: G06F1/24 , G06F15/177 , G06F11/14 , G06F12/02 , G06F9/4401 , G06F8/654
Abstract: A computer boot apparatus and related method use a primary boot component (PBC) that is fixedly mounted in the computer. The PBC has a firmware element that is a non-volatile memory comprising a boot critical portion with instructions that initiate a boot of the computer. The PBC also has a policy manager and a version identifier. The PBC initializes the computer boot via the boot critical portion. The policy manager verifies and authenticates a secondary boot component that is removably attached to the computer.
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公开(公告)号：US20190042391A1
公开(公告)日：2019-02-07
申请号：US15856427
申请日：2017-12-28
Applicant: INTEL CORPORATION
Inventor： Sankaran Menon , Krishna Kumar Ganesan , Rolf Kuehnis , Eija Maarit Hillevi Manninen
CPC classification number: G06F11/364 , G06F11/302 , G06F11/3428 , G06F11/3452 , G06F11/3466 , G06F11/3636 , G06F2201/865
Abstract: Techniques and apparatus for error and performance analysis of a computing device are described. In one embodiment, for example, an apparatus may include at least one memory and logic coupled to the at least one memory, wherein the logic is further to access at least one trace associated with at least one trace source, access timing information associated with the at least one trace, generate a plurality of waypoints for at least one trace, each of the plurality of waypoints comprising a step of at least one trace and a time stamp, and generate at least one performance benchmark log for the at least one trace, the at least one benchmark log comprising a plurality of benchmark waypoints corresponding to the plurality of waypoints.
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公开(公告)号：US20180285126A1
公开(公告)日：2018-10-04
申请号：US15475941
申请日：2017-03-31
Applicant: Intel Corporation
Inventor： Krishna Kumar Ganesan , Karunakara Kotary
CPC classification number: G06F11/1435 , G06F8/654 , G06F9/4401 , G06F9/4403
Abstract: A computer hoot apparatus and related method use a primary boot component (PBC) that is fixedly mounted in the computer. The PBC has a firmware element that is a non-volatile memory comprising a boot critical portion with instructions that initiate a boot of the computer. The PBC also has a policy manager and a version identifier. The PBC initializes the computer boot via the boot critical portion. The policy manager verifies and authenticates a secondary boot component that is removably attached to the computer.
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公开(公告)号：US20180253238A1
公开(公告)日：2018-09-06
申请号：US15448380
申请日：2017-03-02
Applicant: Intel Corporation
Inventor： Karunakara Kotary , Krishna Kumar Ganesan , Vincent J. Zimmer
CPC classification number: G06F3/0619 , G06F3/062 , G06F3/0647 , G06F3/065 , G06F3/0679 , G06F9/4401 , G06F12/1408 , G06F21/575 , G06F2212/1052 , H04L9/3234
Abstract: Systems, apparatuses and methods may include technology that detects a migration request and conducts a first transfer, via a trusted execution environment (TEE), of storage context information from a first removable storage device to a secure memory region of a system in response to the data migration request. Additionally, the technology may conduct a second transfer, via the TEE, of the storage context information from the secure memory region to a second removable storage device, wherein the storage context information includes factory data, security data and boot firmware.
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