公开(公告)号：US09482920B2

公开(公告)日：2016-11-01

申请号：US14504980

申请日：2014-10-02

Applicant: Intermolecular, Inc.

Inventor： Yun Wang

IPC: G02F1/1365 ,  H01L45/00

CPC classification number: G02F1/1365 ,  G02F2203/01 ,  H01L27/24 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146

Abstract: Provided are resistive switching cells and methods of using such cells for controlling operation of liquid crystal display (LCD) cells in LCD devices. A resistive switching cell has two electrodes formed from transparent conductive oxides, such as indium oxide, indium tin oxide, or zinc oxide. One electrode may be connected to a LCD cell thereby forming an in series connection between the resistive switching cell and LCD cell. The other electrode may be used to power the LCD cell through the resistive switching cell. The resistive switching cell also includes a resistive switching layer disposed between the two electrodes. When the resistive switching layer is in its low resistive state, the LCD cell is subjected to an operating potential and produces light. However, when the resistive switching layer is in its high resistive state, the LCD cell is not subjected to the operating potential and does not produce light.

Abstract translation: 提供了电阻式开关单元以及使用这种单元来控制LCD装置中的液晶显示（LCD）单元的操作的方法。 电阻开关单元具有由诸如氧化铟，氧化铟锡或氧化锌的透明导电氧化物形成的两个电极。 一个电极可以连接到LCD单元，从而在电阻开关单元和LCD单元之间形成串联连接。 另一个电极可以用于通过电阻式开关电池为LCD单元供电。 电阻开关单元还包括设置在两个电极之间的电阻开关层。 当电阻式开关层处于低电阻状态时，LCD单元受到工作电位的影响，产生光。 然而，当电阻式开关层处于高电阻状态时，LCD单元不会受到工作电位的影响，不产生光。

公开(公告)号：US09299928B2

公开(公告)日：2016-03-29

申请号：US14625867

申请日：2015-02-19

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: G11C11/00 ,  G11C13/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1253 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/1616

Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

公开(公告)号：US20160028008A1

公开(公告)日：2016-01-28

申请号：US14338979

申请日：2014-07-23

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Federico Nardi

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A metal silicon oxide barrier layer between a nitride electrode containing the same metal and an oxide variable-resistance layer in a ReRAM cell prevents the metal from diffusing into the variable-resistance layer and prevents oxygen from diffusing into and oxidizing the electrode. Compound oxides of the same metal and silicon with varying stoichiometries and metal/silicon ratios may optionally replace part or all of the variable-resistance layer, a defect-reservoir layer, or both. The metal nitride electrode may include a metal silicon nitride current-limiting portion. Optionally, all the layers sharing the common metal may be formed in-situ as part of a single unit process, such as atomic layer deposition.

公开(公告)号：US09246094B2

公开(公告)日：2016-01-26

申请号：US14140683

申请日：2013-12-26

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1266 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1633

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 电阻式开关非易失性存储单元可以包括设置的第一层。 第一层可以用作底部电极。 电阻式开关非易失性存储单元还可以包括设置在第一层上的第二层。 第二层可以用作电阻性开关层，其被配置为在第一电阻状态和第二电阻状态之间切换。 电阻式开关非易失性存储单元可以包括设置在第二层上的第三层。 第三层可以用作电阻层，其被配置为至少部分地确定电阻式开关非易失性存储元件的电阻率。 第三层可以包括半金属材料。 电阻式开关非易失性存储单元可以包括可以用作顶部电极的第四层。

公开(公告)号：US09246091B1

公开(公告)日：2016-01-26

申请号：US14338979

申请日：2014-07-23

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Federico Nardi

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A metal silicon oxide barrier layer between a nitride electrode containing the same metal and an oxide variable-resistance layer in a ReRAM cell prevents the metal from diffusing into the variable-resistance layer and prevents oxygen from diffusing into and oxidizing the electrode. Compound oxides of the same metal and silicon with varying stoichiometries and metal/silicon ratios may optionally replace part or all of the variable-resistance layer, a defect-reservoir layer, or both. The metal nitride electrode may include a metal silicon nitride current-limiting portion. Optionally, all the layers sharing the common metal may be formed in-situ as part of a single unit process, such as atomic layer deposition.

Abstract translation: 在ReRAM单元中含有相同金属的氮化物电极和氧化物可变电阻层之间的金属氧化硅阻挡层防止金属扩散到可变电阻层中，并防止氧气扩散到氧化电极。 具有不同化学计量和金属/硅比的相同金属和硅的复合氧化物可任选地替代部分或全部可变电阻层，缺陷储层或两者。 金属氮化物电极可以包括金属氮化硅限流部。 可选地，共享公共金属的所有层可以原位形成为单个单元工艺的一部分，例如原子层沉积。

公开(公告)号：US09184383B2

公开(公告)日：2015-11-10

申请号：US14156762

申请日：2014-01-16

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625

Abstract: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

Abstract translation: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成 器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

公开(公告)号：US09178000B1

公开(公告)日：2015-11-03

申请号：US14264280

申请日：2014-04-29

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Federico Nardi ,  Ryan C. Clarke ,  Tim Minvielle ,  Yun Wang

IPC: H01L29/02 ,  H01L29/792 ,  H01L27/11 ,  H01L21/00 ,  H01L27/24 ,  H01L45/00 ,  H01L29/08 ,  H01L21/265 ,  H01L21/02

CPC classification number: H01L27/2463 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/265 ,  H01L27/2436 ,  H01L29/0847 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells having extended conductive layers operable as electrodes of other devices, and methods of fabricating such cells and other devices. A conductive layer of a ReRAM cell extends beyond the cell boundary defined by the variable resistance layer. The extended portion may be used a source or drain region of a FET that may control an electrical current through the cell or other devices. The extended conductive layer may be also operable as electrode of another resistive-switching cell or a different device. The extended conductive layer may be formed from doped silicon. The variable resistance layer of the ReRAM cell may be positioned on the same level as a gate dielectric layer of the FET. The variable resistance layer and the gate dielectric layer may have the same thickness and share common materials, though they may be differently doped.

Abstract translation: 提供了具有可操作为其他器件的电极的延伸导电层的电阻随机存取存储器（ReRAM）单元，以及制造这样的单元和其它器件的方法。 ReRAM单元的导电层延伸超过由可变电阻层限定的单元边界。 延伸部分可以用于可控制通过电池或其他装置的电流的FET的源极或漏极区域。 扩展导电层也可以作为另一电阻式开关电池或不同器件的电极工作。 延伸的导电层可以由掺杂的硅形成。 ReRAM单元的可变电阻层可以位于与FET的栅极电介质层相同的水平上。 可变电阻层和栅极电介质层可以具有相同的厚度并且共享共同的材料，尽管它们可以是不同的掺杂。

公开(公告)号：US20150188046A1

公开(公告)日：2015-07-02

申请号：US14141627

申请日：2013-12-27

Applicant: Intermolecular Inc.

Inventor： Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/16

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof The ReRAM cells may include a first layer operable as a bottom electrode. The ReRAM cells may also include a second layer operable as a variable resistance layer configured to switch between at least a first resistive state and a second resistive state. The ReRAM cells may further include a third layer formed over the second layer. The third layer may have a substantially constant electrical resistivity. Moreover, the third layer may include a ternary metal-silicon nitride having a ratio of metal to silicon that is between about 1:1 and 1:4. Furthermore, the ternary metal-silicon nitride may include a metal that has an atomic weight that is greater than 90. The ReRAM cells may further include a fourth layer operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。ReRAM单元可以包括可操作为底部电极的第一层。 ReRAM单元还可以包括可操作为可配置为在至少第一电阻状态和第二电阻状态之间切换的可变电阻层的第二层。 ReRAM单元还可以包括形成在第二层上的第三层。 第三层可以具有基本上恒定的电阻率。 此外，第三层可以包括金属与硅的比例在约1:1至1:4之间的三元金属 - 氮化硅。 此外，三元金属 - 氮化硅可以包括具有大于90的原子量的金属.RRRAM单元还可以包括可操作为顶部电极的第四层。

公开(公告)号：US20150188039A1

公开(公告)日：2015-07-02

申请号：US14140755

申请日：2013-12-26

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Vidyut Gopal ,  Mihir Tendulkar

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/12 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The ReRAM cells may include a first layer operable as a bottom electrode and a second layer operable to switch between at least a first resistive state and a second resistive state. The ReRAM cells may include a third layer including a first oxygen getter material and a fourth layer including a metal silicon nitride. The ReRAM cells may further include a fifth layer including a second oxygen getter material. The first oxygen getter material and the second oxygen getter material may be more reactive with oxygen than the metal silicon nitride. A work function of the first oxygen getter material and a work function of the second oxygen getter material may be substantially lower than a work function of the metal silicon nitride. The ReRAM cells may include a sixth layer operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元可以包括可操作为底部电极的第一层和可操作以在至少第一电阻状态和第二电阻状态之间切换的第二层。 ReRAM单元可以包括包括第一氧吸气材料的第三层和包括金属氮化硅的第四层。 ReRAM单元还可以包括第五层，其包括第二氧气吸气材料。 第一吸氧剂材料和第二氧气吸气材料可以比金属氮化硅更能反应氧气。 第一吸氧剂材料的功函数和第二吸氧剂材料的功函数可以基本上低于金属氮化硅的功函数。 ReRAM单元可以包括可操作为顶部电极的第六层。

公开(公告)号：US20150162530A1

公开(公告)日：2015-06-11

申请号：US14625867

申请日：2015-02-19

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1253 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/1616

Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

Abstract translation: 本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括至少一层电阻材料，其被配置为提高所形成的电阻式开关存储元件的开关性能和寿命。 所形成的限流层或电阻层的电性能被配置为在逻辑状态编程步骤（即“设定”和“复位”步骤）期间通过添加固定的串联电阻来降低通过可变电阻层的电流 在形成在非易失性存储器件中的电阻式开关存储元件中。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。