公开(公告)号：US20150076631A1

公开(公告)日：2015-03-19

申请号：US14225275

申请日：2014-03-25

Applicant: InvenSense, Inc.

Inventor： Jongwoo SHIN ,  Kirt Reed WILLIAMS ,  Cerina ZHANG ,  Kuolung (Dino) LEI

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0133

Abstract: A MEMS (microelectromechanical systems) structure comprises a MEMS wafer. A MEMS wafer includes a cap with cavities bonded to a structural layer through a dielectric layer disposed between the cap and the structural layer. Unique configurations of MEMS devices and methods of providing such are set forth which provide for, in part, creating rounded, scalloped or chamfered MEMS profiles by shaping the etch mask photoresist reflow, by using a multi-step deep reactive ion etch (DRIE) with different etch characteristics, or by etching after DRIE.

Abstract translation: MEMS（微机电系统）结构包括MEMS晶片。 MEMS晶片包括具有通过布置在盖和结构层之间的电介质层结合到结构层的空腔的盖。 阐述了MEMS器件的独特结构和提供这些器件的方法，其部分地通过使用多步骤深反应离子蚀刻（DRIE）形成蚀刻掩模光致抗蚀剂回流来形成圆形，扇形或倒角的MEMS轮廓， 不同的蚀刻特性，或通过DRIE后的蚀刻。

公开(公告)号：US20170001861A1

公开(公告)日：2017-01-05

申请号：US15265668

申请日：2016-09-14

Applicant: InvenSense, Inc.

Inventor： Cerina ZHANG ,  Martin LIM ,  Jongwoo SHIN ,  Joseph SEEGER

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00301 ,  B81B7/007 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C1/0023 ,  B81C1/00238 ,  B81C1/00246 ,  B81C1/00269 ,  B81C2201/0104 ,  B81C2201/0132 ,  B81C2203/0145 ,  B81C2203/019 ,  B81C2203/035 ,  B81C2203/0792

Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.

Abstract translation: 半导体制造工艺包括提供第一衬底，其具有设置在图案化顶层金属层上方的第一钝化层，并且还具有设置在第一钝化层上的第二钝化层; 第二钝化层具有顶表面。 所述方法还包括在第二钝化层的第一部分中形成开口，并且开口暴露第一钝化层的表面的一部分。 所述方法还包括图案化第二钝化层和第一钝化层以暴露图案化顶层金属层的部分并将第二基板和第一基板彼此接合。 接合发生在至少第一钝化层的暴露部分经历脱气的温度范围内。

公开(公告)号：US20170081181A1

公开(公告)日：2017-03-23

申请号：US14857687

申请日：2015-09-17

Applicant: InvenSense, Inc.

Inventor： Cerina ZHANG ,  Martin LIM

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00333 ,  B81B3/0051 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0315 ,  B81B2207/012 ,  B81B2207/07 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/035 ,  B81C2203/038

Abstract: A method for forming a MEMS device includes coupling a MEMS substrate and a base substrate. The MEMS substrate and the base substrate contain at least two enclosures. One enclosures has a first vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate that is less than a second vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate than another of the enclosures to provide a height difference between the first vertical gap and the second vertical gap. The method includes bonding the bonding surfaces of the one of the two enclosures at a first pressure to provide a first sealed enclosure. The method includes bonding the bonding surfaces of other of the two enclosures at a second pressure to provide a second sealed enclosure.

公开(公告)号：US20160075554A1

公开(公告)日：2016-03-17

申请号：US14850860

申请日：2015-09-10

Applicant: InvenSense, Inc.

Inventor： Anatole HUANG ,  Jongwoo SHIN ,  Peter SMEYS ,  Cerina ZHANG ,  Jong Il SHIN

IPC: B81B7/00 ,  B81C1/00

Abstract: A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate.

Abstract translation: 公开了具有被配置为避免颗粒污染的通道的MEMS器件。 MEMS器件包括MEMS衬底和基底衬底。 MEMS衬底包括MEMS器件区域，密封环和沟道。 密封环提供将MEMS器件区域分成多个空腔，其中多个空腔中的至少一个包括一个或多个通气孔。 通道配置在一个或多个通气孔和MEMS器件区域之间。 优选地，通道被配置为使直接进入MEMS器件区域的颗粒最小化。 基底衬底耦合到MEMS器件衬底。