公开(公告)号：US20230086074A1

公开(公告)日：2023-03-23

申请号：US17694098

申请日：2022-03-14

Applicant: Kioxia Corporation

Inventor： Yusuke NAKAJIMA ,  Akira TAKASHIMA ,  Tsunehiro INO ,  Yasushi NAKASAKI ,  Koji USUDA ,  Masaki NOGUCHI

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a gate electrode layer, and a first insulating layer provided between the semiconductor layer and the gate electrode layer, the first insulating layer including aluminum oxide including at least one crystal phase selected from the group consisting of alpha (α)-aluminum oxide and theta (θ)-aluminum oxide, the first insulating layer having a thickness of equal to or less than 2.5 nm in a first direction from the semiconductor layer toward the gate electrode layer.

公开(公告)号：US20220093634A1

公开(公告)日：2022-03-24

申请号：US17189218

申请日：2021-03-01

Applicant: KIOXIA CORPORATION

Inventor： Akira TAKASHIMA ,  Tsunehiro INO ,  Yasushi NAKASAKI ,  Yoshihiko MORIYAMA

IPC: H01L27/11582 ,  H01L29/51

Abstract: According to one embodiment, a semiconductor memory device includes a stacked structure including conductive layers arranged in a first direction, and a columnar structure extending in the first direction in the first stacked structure. The columnar structure includes a semiconductor layer extending in the first direction, a charge storage layer between the semiconductor layer and the stacked structure, a first insulating layer between the semiconductor layer and the charge storage layer, and a second insulating layer between the stacked structure and the charge storage layer. The charge storage layer is aluminum nitride with a wurtzite crystal structure in which the c-axis is oriented in a direction towards the first insulating layer from the second insulating layer.

公开(公告)号：US20240040804A1

公开(公告)日：2024-02-01

申请号：US18181133

申请日：2023-03-09

Applicant: Kioxia Corporation

Inventor： Tsunehiro INO

IPC: H10B63/00 ,  H10B43/27 ,  H10B43/35 ,  H10B63/10

CPC classification number: H10B63/845 ,  H10B43/27 ,  H10B43/35 ,  H10B63/10 ,  H10B63/34

Abstract: A memory device of embodiments includes: a semiconductor layer extending in a first direction; a gate electrode layer containing a first material or a second material, the first material containing tantalum (Ta), tungsten (W), and nitrogen (N), an atomic concentration of nitrogen being less than a sum of an atomic concentration of tantalum and an atomic concentration of tungsten, the second material containing niobium (Nb), molybdenum (Mo), and nitrogen (N), and an atomic concentration of nitrogen being less than a sum of an atomic concentration of niobium and an atomic concentration of molybdenum; a charge storage layer provided between the semiconductor layer and the gate electrode layer; a first insulating layer provided between the semiconductor layer and the charge storage layer; and a second insulating layer provided between the charge storage layer and the gate electrode layer.

公开(公告)号：US20230085754A1

公开(公告)日：2023-03-23

申请号：US17652308

申请日：2022-02-24

Applicant: Kioxia Corporation

Inventor： Tsunehiro INO ,  Akira TAKASHIMA

IPC: H01L27/1159 ,  H01L29/51 ,  H01L29/78

Abstract: A memory device according to an embodiment includes a semiconductor layer, a gate electrode layer, and a first dielectric layer provided between the semiconductor layer and the gate electrode layer. The first dielectric layer contains aluminum (Al), a first element, nitrogen (N), and silicon (Si). The first element is at least one element selected from the group consisting of scandium (Sc), yttrium (Y), lanthanoid (Ln), boron (B), gallium (Ga), and indium (In).

公开(公告)号：US20210296400A1

公开(公告)日：2021-09-23

申请号：US17125126

申请日：2020-12-17

Applicant: Kioxia Corporation

Inventor： Tsunehiro INO ,  Yukihiro NOMURA ,  Kazuhiko YAMAMOTO ,  Koji USUDA

IPC: H01L27/24 ,  H01L45/00

Abstract: A memory device of an embodiment includes: a first conductive layer; a second conductive layer; a resistance change region provided between the first conductive layer and the second conductive layer; a first region provided between the resistance change region and the first conductive layer, the first region including a first element selected from the group consisting of niobium, vanadium, tantalum, and titanium, and a second element selected from the group consisting of oxygen, sulfur, selenium, and tellurium, the first region having a first atomic ratio of the first element to the second element; and a second region provided between the first region and the resistance change region, the second region including the first element and the second element, the second region having a second atomic ratio of the first element to the second element, the second atomic ratio being smaller than the first atomic ratio.

公开(公告)号：US20240428856A1

公开(公告)日：2024-12-26

申请号：US18669736

申请日：2024-05-21

Applicant: Kioxia Corporation

Inventor： Akira TAKASHIMA ,  Tsunehiro INO

IPC: G11C16/04 ,  H10B43/27 ,  H10B43/35

Abstract: A semiconductor memory device of an embodiment includes a stacked body including a first insulating layer, a first conductive layer and a second insulating layer; a semiconductor film extending in a first direction; a tunnel insulating film provided between the stacked body and the semiconductor film, the tunnel insulating film extending in the first direction; a first block insulating film provided between the first conductive layer and the tunnel insulating film; and a first charge storage film containing a metal oxide or a metal oxynitride and including: a first portion provided between the tunnel insulating film and the first block insulating film, a second portion provided between the tunnel insulating film and the first insulating layer, the second portion being connected to the first portion and a third portion provided between the tunnel insulating film and the second insulating layer, the third portion being connected to the first portion.

公开(公告)号：US20230413554A1

公开(公告)日：2023-12-21

申请号：US18177055

申请日：2023-03-01

Applicant: Kioxia Corporation

Inventor： Yusuke NAKAJIMA ,  Akira TAKASHIMA ,  Tsunehiro INO ,  Atsushi MURAKOSHI ,  Masaki NOGUCHI

IPC: H10B43/27 ,  H10B43/10

CPC classification number: H10B43/27 ,  H10B43/10

Abstract: According to one embodiment, a semiconductor device includes a stacked body of alternating conductor layers and insulator layers stacked in a first direction and a columnar body extending through the stacked body in the first direction. The columnar body includes a first insulating layer extending in the first direction and comprising aluminum and oxygen, a semiconductor layer between the first insulating layer and the conductor layers of the stacked body, a charge storage film between the semiconductor layer and the conductor layers, and a second insulating layer between the semiconductor layer and the first insulating layer and comprising silicon and oxygen. An interface between the semiconductor layer and the second insulating layer contains nitrogen to eliminate defects which may reduce channel mobility or the like.

公开(公告)号：US20220406809A1

公开(公告)日：2022-12-22

申请号：US17645138

申请日：2021-12-20

Applicant: Kioxia Corporation

Inventor： Akira TAKASHIMA ,  Tsunehiro INO

IPC: H01L27/11578 ,  H01L27/11551

Abstract: A semiconductor memory device according to an embodiment includes: a semiconductor layer extending in a first direction; a first gate electrode layer; a charge storage layer between the semiconductor layer and the first gate electrode layer, the charge storage layer containing a first element, a second element, and oxygen, the first element being at least one element selected from the group consisting of hafnium and zirconium, and the second element being at least one element selected from the group consisting of nitrogen and aluminum; a first insulating layer between the charge storage layer and the first gate electrode layer; and a second insulating layer between the semiconductor layer and the first gate electrode layer, the second insulating layer containing silicon and nitrogen, the second insulating layer surrounding the charge storage layer in a cross section that being parallel to the first direction and including the charge storage layer.

公开(公告)号：US20230093157A1

公开(公告)日：2023-03-23

申请号：US17684331

申请日：2022-03-01

Applicant: KIOXIA CORPORATION

Inventor： Shigeyuki HIRAYAMA ,  Takayuki SASAKI ,  Yukihiro NOMURA ,  Tsunehiro INO

IPC: H01L45/00 ,  H01L27/24

Abstract: A storage device includes a first electrode, a second electrode, and a resistance change storage layer between the first and second electrodes. The storage layer is either in a first resistance state or in a second resistance state having a resistance higher than the first resistance state and contains at least two elements selected from a group consisting of germanium, antimony, and tellurium. The storage device further includes an interface layer between the first electrode and the resistance change storage layer. The interface layer contains at least one of the elements of the resistance change storage layer and includes a conductive region and an insulating region.

公开(公告)号：US20210296326A1

公开(公告)日：2021-09-23

申请号：US17000545

申请日：2020-08-24

Applicant: Kioxia Corporation

Inventor： Tsunehiro INO ,  Akira TAKASHIMA ,  Reika TANAKA

IPC: H01L27/1157 ,  H01L27/11565 ,  H01L27/11578

Abstract: A semiconductor memory device of an embodiment includes: a semiconductor layer; a gate electrode layer; a first insulating layer provided between the semiconductor layer and the gate electrode layer; a second insulating layer provided between the first insulating layer and the gate electrode layer; and an intermediate layer provided between the first insulating layer and the second insulating layer, the intermediate layer containing a first crystal of a space group Pbca (space group number 61), a space group P42/nmc (space group number 137), or a space group R-3m (space group number 166), and the intermediate layer containing hafnium (Hf), oxygen (O), and nitrogen (N).