公开(公告)号：US10778925B2

公开(公告)日：2020-09-15

申请号：US16439297

申请日：2019-06-12

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  H01L27/148 ,  G01N21/95 ,  G06T7/00

Abstract: A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

公开(公告)号：US10462391B2

公开(公告)日：2019-10-29

申请号：US15210056

申请日：2016-07-14

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  David L. Brown ,  Devis Contarato ,  John Fielden ,  Daniel I. Kavaldjiev ,  Guoheng Zhao ,  Jehn-Huar Chern ,  Guowu Zheng ,  Donald W. Pettibone ,  Stephen Biellak

IPC: H04N5/335 ,  G01N21/95 ,  G06T7/00 ,  H04N5/225 ,  H04N5/347 ,  H04N5/378 ,  H04N5/3745 ,  H04N5/376 ,  G01N21/956

Abstract: An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

公开(公告)号：US10466212B2

公开(公告)日：2019-11-05

申请号：US15667500

申请日：2017-08-02

Applicant: KLA-Tencor Corporation

Inventor： David L. Brown ,  Yung-Ho Alex Chuang ,  John Fielden ,  Marcel Trimpl ,  Jingjing Zhang ,  Devis Contarato ,  Venkatraman Iyer

IPC: H01J37/244 ,  G01N30/72 ,  H01J37/28 ,  H01L31/00 ,  G01T1/24 ,  G06F19/00 ,  H01J49/02 ,  H01L27/146

Abstract: A scanning electron microscope incorporates a multi-pixel solid-state electron detector. The multi-pixel solid-state detector may detect back-scattered and/or secondary electrons. The multi-pixel solid-state detector may incorporate analog-to-digital converters and other circuits. The multi-pixel solid state detector may be capable of approximately determining the energy of incident electrons and/or may contain circuits for processing or analyzing the electron signals. The multi-pixel solid state detector is suitable for high-speed operation such as at a speed of about 100 MHz or higher. The scanning electron microscope may be used for reviewing, inspecting or measuring a sample such as unpatterned semiconductor wafer, a patterned semiconductor wafer, a reticle or a photomask. A method of reviewing or inspecting a sample is also described.

公开(公告)号：US09767986B2

公开(公告)日：2017-09-19

申请号：US14834991

申请日：2015-08-25

Applicant: KLA-Tencor Corporation

Inventor： David L. Brown ,  Yung-Ho Alex Chuang ,  John Fielden ,  Marcel Trimpl ,  Jingjing Zhang ,  Devis Contarato ,  Venkatraman Iyer

IPC: H01J37/244 ,  H01J37/28 ,  H01L31/00 ,  G01T1/24

CPC classification number: G01N30/72 ,  G01T1/24 ,  G06F19/00 ,  H01J37/244 ,  H01J37/28 ,  H01J49/02 ,  H01J2237/2441 ,  H01J2237/2446 ,  H01J2237/24475 ,  H01J2237/24495 ,  H01J2237/24592 ,  H01L27/1464 ,  H01L27/14659 ,  H01L27/14661 ,  H01L31/00

Abstract: A scanning electron microscope incorporates a multi-pixel solid-state electron detector. The multi-pixel solid-state detector may detect back-scattered and/or secondary electrons. The multi-pixel solid-state detector may incorporate analog-to-digital converters and other circuits. The multi-pixel solid state detector may be capable of approximately determining the energy of incident electrons and/or may contain circuits for processing or analyzing the electron signals. The multi-pixel solid state detector is suitable for high-speed operation such as at a speed of about 100 MHz or higher. The scanning electron microscope may be used for reviewing, inspecting or measuring a sample such as unpatterned semiconductor wafer, a patterned semiconductor wafer, a reticle or a photomask. A method of reviewing or inspecting a sample is also described.

公开(公告)号：US10764527B2

公开(公告)日：2020-09-01

申请号：US16397072

申请日：2019-04-29

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H01L27/148 ,  H04N5/378 ,  H04N5/361 ,  G01N21/956 ,  G01N21/95 ,  G06T7/00 ,  H04N5/372

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US20190313044A1

公开(公告)日：2019-10-10

申请号：US16439297

申请日：2019-06-12

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  G06T7/00 ,  H01L27/148 ,  G01N21/95

Abstract: A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

公开(公告)号：US20170295334A1

公开(公告)日：2017-10-12

申请号：US15337604

申请日：2016-10-28

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/95 ,  H01L27/148 ,  H04N5/372 ,  G06T7/00

CPC classification number: H04N5/378 ,  G01N21/9501 ,  G06T7/0008 ,  G06T2207/30148 ,  H01L27/14812 ,  H01L27/14825 ,  H04N5/361 ,  H04N5/372

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US20170048467A1

公开(公告)日：2017-02-16

申请号：US15210056

申请日：2016-07-14

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  David L. Brown ,  Devis Contarato ,  John Fielden ,  Daniel I. Kavaldjiev ,  Guoheng Zhao ,  Jehn-Huar Chern ,  Guowu Zheng ,  Donald W. Pettibone ,  Stephen Biellak

IPC: H04N5/335 ,  G01N21/95 ,  G06T7/00

CPC classification number: H04N5/335 ,  G01N21/9501 ,  G01N2021/95676 ,  H04N5/2256 ,  H04N5/347 ,  H04N5/3745 ,  H04N5/3765 ,  H04N5/378

Abstract: An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

Abstract translation: 一种检查系统和方法，其中由图像传感器捕获的模拟图像数据值（电荷）在作为图像传感器的输出感测节点（浮动扩散）之间的输出信号被发送之前或同时被分组（组合），并且其中ADC是 被控制以在输出感测节点的每个复位之间顺序地生成多个对应的数字图像数据值。 根据输出合并方法，驱动图像传感器以在每个复位之间顺序地将多个电荷传送到输出感测节点上，并且在每个电荷被传送到输出感测节点之后，控制ADC转换递增增加的输出信号。 根据多采样方法，在转移到输出感测节点之前，将多个电荷垂直或水平分类（相加/组合），并且ADC对每个对应的输出信号进行多次采样。 可以组合输出合并和多采样方法。

公开(公告)号：US20190253652A1

公开(公告)日：2019-08-15

申请号：US16397072

申请日：2019-04-29

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  G06T7/00 ,  H01L27/148 ,  G01N21/95

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US10313622B2

公开(公告)日：2019-06-04

申请号：US15337604

申请日：2016-10-28

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/95 ,  G06T7/00 ,  H01L27/148 ,  H04N5/372 ,  H04N5/361

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.