Artificial neuron device using ovonic threshold switch, artificial neuron chip and user apparatus including the same

    公开(公告)号:US11544541B2

    公开(公告)日:2023-01-03

    申请号:US16526537

    申请日:2019-07-30

    Abstract: An artificial neuron device according to an embodiment of the present disclosure includes a first resistor connected between an input terminal and a first node; a capacitor connected between the first node and a ground terminal; a threshold switch connected between the first node and a second node; and a second resistor connected between the second node and the ground terminal, wherein, when an input voltage of a certain level is applied to the input terminal by time, a membrane potential occurs at the first node and a spike current flows through the second node. According to present disclosure, the artificial neuron device expresses the Integrate-and-Fire function, the rate coding ability, the SFA characteristics, and the chaotic activity of the biological neuron, and therefore may be widely used for the artificial neuron network device, the large-scale brain-inspired computing system, and the artificial intelligence (AI) system.

    Neuromorphic circuit including spike regulator based on flash memory

    公开(公告)号:US12210960B2

    公开(公告)日:2025-01-28

    申请号:US17205790

    申请日:2021-03-18

    Abstract: Embodiments of inventive concepts relate to a neuromorphic circuit including a flash memory-based spike regulator capable of generating a stable spike signal with a small number of devices. The neuromorphic circuit may generate a simple and stable spike signal using a flash memory-based spike regulator. Therefore, it is possible to implement a semiconductor neuromorphic circuit at low power and low cost by using the spike regulator of the present invention. Example embodiments of inventive concepts provide a neuromorphic circuit comprising a control signal generator for generating a control signal for generating a pulse signal; and a spike regulator for generating a spike signal in response to the control signal. Wherein the spike regulator comprises a first transistor for switching an input signal transmitted to one terminal to the other terminal in response to the control signal; and a first flash memory type transistor having a drain terminal connected to the other terminal of the first transistor and transferring the switched input signal to a source terminal as a spike signal.

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