摘要:
Upon receiving a level of a second node through a third switch in the first half of a first period, a holding circuit outputs it as a fuse signal indicating a blown-out state of a fuse. Since the third switch turns off in the second half of the first period, a change in level of the second node occurring thereafter will not affect data in the holding circuit, whereby prevents malfunction of a fuse circuit. With the fuse blown, a level of a first node gets fixed at that of a second power supply line after the first period. This eliminates a voltage difference between both ends of the fuse, thereby preventing a growback. No occurrence of growback makes just one fuse blowing sufficient for the fuse circuit even with the fuse not completely cut off. This consequently shortens a time for blowing the fuse in a test process.
摘要:
Operating margins of a semiconductor integrated circuit are reliably tested at low power consumption by switching power supply circuits between normal operation mode wherein a first step-up power supply serves both memory core and a step-down power supply, and testing mode wherein the memory core is powered by an external testing power supply that provides a fluctuating voltage for testing, and the step-down power supply is served by a second step-up power supply.
摘要:
First and second voltage generators generate a first internal power supply voltage to be supplied to a first internal power supply line and a second internal power supply voltage to be supplied to a second internal power supply line, respectively. A short circuit shorts the first and second internal power supply lines when operations of both the first and second voltage generators are suspended. The first and second internal power supply lines become floating, and charges stored in the respective internal power supply lines drain out gradually. Here, since the charges are redistributed to both of the internal power supply lines, the first and second internal power supply voltages become equal in value as they drop off. Consequently, the first and second internal power supply voltages can be prevented from inversion, and internal circuits connected to both the first and second internal power supply lines can be precluded from malfunctioning.
摘要:
A memory circuit has: a real cell array; a parity generating circuit for generating a parity bit from data of the real cell array; a parity cell array; a refresh control circuit, which sequentially refreshes the real cell array, and when an internal refresh request and a read request coincide, prioritizes a refresh operation; a data recovery section, which, in accordance with the parity bit read out from the parity cell array, recovers data read out from the real cell array; and an output circuit for outputting data from the real cell array. Further, the memory circuit has a test control circuit, which, at a first test mode, prohibits a refresh operation for the real cell array to output data read out from the real cell array, and, at a second test mode, controls the output circuit so as to output data read out from the parity cell array.
摘要:
A power supply circuit includes a first NMOS-type current mirror circuit which compares a first potential with a second potential, a second NMOS-type current mirror circuit which compares the first potential with a third potential, and a potential setting circuit which adjusts the first potential in response to outputs of the first and second NMOS-type current mirror circuits, such that the first potential falls between the second potential and the third potential.
摘要:
A semiconductor device includes a plurality of word lines selectable in a predetermined mode, and a circuit that precharges the plurality of word lines selected in the predetermined mode in a time division manner.
摘要:
A redundancy memory circuit stores a defect address indicating a defective memory cell row. A redundancy control circuit disables the defective memory cell row corresponding to the defect address stored in the redundancy memory circuit and enables a redundancy memory cell row in the memory block containing the defective memory cell row. Moreover, in the other memory blocks, the redundancy control circuit disables memory cell rows corresponding to the defective memory cell row and enables redundancy memory cell rows instead of these memory cell rows. Consequently, not only the memory block having the defective memory cell row but one of the memory cell rows in the other memory blocks is always also relieved. Thus, the redundancy memory circuit can be shared among all the memory blocks with a reduction in the number of redundancy memory circuits. As a result, the semiconductor memory can be reduced in chip size.
摘要:
A method of coating without permitting the coating solution to flow onto the side surfaces or the back surfaces of the lenses in the operation for applying the coating solution onto the lenses. A lens 15 is spin-coated with the coating solution having a particular viscosity. A side edge portion 121 of a spatula 119 is brought into contact with an upper edge portion of a side surface 15a of the lens 15 before the coating solution fed onto the surface of the lens arrives at the peripheral edge portion of the lens. The side edge portion 121 of the spatula 119 is so arranged that the upper end side of the spatula is tilted toward the center side of the lens 15 at an angle of 5 to 35 degrees with the vertical line as a reference. The coating solution applied onto the lens 15 that is rotating adheres onto the spatula 119 but does not adhere onto the side surface of the lens 15.
摘要:
A photochromic composition, which can function as an adhesive layer for bonding optical sheets made from a polycarbonate resin, may include a polyurethane-urea resin (A) obtained by reacting a polyol compound (A1), a polyisocyante compound (A2) that has two or more isocyanato groups in the molecule, and an amino-containing compound (A3) that contains two or more isocyanato-reactive groups in the molecule, with at least one of the isocyanato-reactive groups being an amino group; and a photochromic compound (B).
摘要:
A process for efficiently forming a thick coating layer having a uniform thickness on the surface of a base material having a curved surface. The process comprises the steps of forming a coating film having a predetermined thickness by applying a coating agent containing a polymerizable monomer on the curved surface of a base material, and then curing the coating film in an atmosphere of an oxygen concentration of not more than 500 ppm by photo-polymerization while substantially maintaining the uniformity of the thickness of the coating film. Preferably, the photo-polymerization of the coating film is carried out while rotating the base material at a rotational speed of from 20 to 1500 rpm.