公开(公告)号：US10025413B2

公开(公告)日：2018-07-17

申请号：US14841534

申请日：2015-08-31

Applicant: LG Display Co., Ltd.

Inventor： DongSoo Kim ,  SangHee Yu ,  SangWoon Kim

IPC: G06F3/041 ,  G06F21/88 ,  H01L27/12 ,  H01L21/312 ,  H01L29/786 ,  H01L29/24 ,  G06F3/044

Abstract: A touch recognition enabled display panel includes a plurality of common electrode blocks serving as touch-sensing regions and/or touch-driving regions. Conductive lines connected to the common electrode blocks are placed under the common electrode blocks and the pixel electrodes of the pixels, and they are routed across the active area, directly toward an inactive area where drive-integrated circuits are located. The conductive lines are positioned under one or more planarization layers, and are connected to the corresponding common electrode blocks via one or more contact holes.

公开(公告)号：US20160182042A1

公开(公告)日：2016-06-23

申请号：US14969280

申请日：2015-12-15

Applicant: LG Display Co., Ltd.

Inventor： DongSoo Kim ,  Hun Jeoung ,  SangHee Yu ,  SungHyun Cho ,  BoSun Lee ,  Sungwook Chang

IPC: H03K17/687 ,  G09G3/20 ,  G06F1/04

CPC classification number: H03K17/6871 ,  G06F1/04 ,  G09G3/2092 ,  G09G3/3225 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0809 ,  G09G2310/0224 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0214 ,  G11C19/28

Abstract: A gate driver and a display device including the gate driver are provided which can prevent an abnormal output of a gate-high voltage from a stage by stably maintaining a discharge potential of a pull-up node. The gate driver includes a plurality of stages, and each stage includes a pull-up transistor that outputs a clock signal input to a first clock terminal to an output terminal depending on a voltage of a pull-up node; a pull-down transistor that outputs a first source voltage input to a first source voltage terminal to the output terminal depending on a voltage of a pull-down node; and a first noise removing unit that supplies a gate-off voltage to the pull-up node to remove noise of the pull-up node in response to the clock signal input to the first clock terminal.

Abstract translation: 提供了一种栅极驱动器和包括栅极驱动器的显示装置，其可以通过稳定地维持上拉节点的放电电位来防止来自级的栅极 - 高电压的异常输出。 栅极驱动器包括多个级，并且每个级包括上拉晶体管，其根据上拉节点的电压将输入到第一时钟端子的时钟信号输出到输出端子; 下拉晶体管，其根据下拉节点的电压将输入到第一源极电压端子的第一源极电压输出到输出端子; 以及第一噪声去除单元，其向所述上拉节点提供栅极截止电压，以响应于输入到所述第一时钟端子的时钟信号来去除所述上拉节点的噪声。

公开(公告)号：US09774325B2

公开(公告)日：2017-09-26

申请号：US14969280

申请日：2015-12-15

Applicant: LG Display Co., Ltd.

Inventor： DongSoo Kim ,  Hun Jeoung ,  SangHee Yu ,  SungHyun Cho ,  BoSun Lee ,  Sungwook Chang

IPC: G09G3/36 ,  H03K17/687 ,  G09G3/3225 ,  G09G3/3266 ,  G11C19/28 ,  G06F1/04 ,  G09G3/20

CPC classification number: H03K17/6871 ,  G06F1/04 ,  G09G3/2092 ,  G09G3/3225 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0809 ,  G09G2310/0224 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0214 ,  G11C19/28

Abstract: A gate driver and a display device including the gate driver are provided which can prevent an abnormal output of a gate-high voltage from a stage by stably maintaining a discharge potential of a pull-up node. The gate driver includes a plurality of stages, and each stage includes a pull-up transistor that outputs a clock signal input to a first clock terminal to an output terminal depending on a voltage of a pull-up node; a pull-down transistor that outputs a first source voltage input to a first source voltage terminal to the output terminal depending on a voltage of a pull-down node; and a first noise removing unit that supplies a gate-off voltage to the pull-up node to remove noise of the pull-up node in response to the clock signal input to the first clock terminal.

公开(公告)号：US11107388B2

公开(公告)日：2021-08-31

申请号：US15498584

申请日：2017-04-27

Applicant: LG Display Co., Ltd.

Inventor： SungHyun Cho ,  ChungSik Kong ,  Byoungwoo Kim ,  Sungwook Chang ,  DongSoo Kim

IPC: G11C19/00 ,  G09G3/20 ,  G11C19/28

Abstract: A gate driving circuit and a display device are disclosed. The gate driving circuit includes a shift register including a plurality of stages. Among the stages, an Nth stage includes a first transistor charging a Q node and a junction stress control circuit. A pull-up transistor using the Q node as a gate input controls an output signal of a stage output terminal. The junction stress control circuit includes a first, second, and third control transistors. The first control transistor, the second control transistor, the third control transistor, and the first transistor are connected to each other through a common node. The second control transistor adjusts junction stresses for the first control transistor and the first transistor by controlling a voltage of the common node. When the second control transistor is turned off, the third control transistor discharges the voltage of the common node.

公开(公告)号：US20170060317A1

公开(公告)日：2017-03-02

申请号：US14841534

申请日：2015-08-31

Applicant: LG Display Co., Ltd.

Inventor： DongSoo Kim ,  SangHee Yu ,  SangWoon Kim

IPC: G06F3/041 ,  G06F3/044 ,  H01L29/24 ,  H01L27/12 ,  H01L29/786

CPC classification number: G06F3/0416 ,  G06F3/0412 ,  G06F3/044 ,  G06F2203/04103 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/7869

Abstract: A touch recognition enabled display panel includes a plurality of common electrode blocks serving as touch-sensing regions and/or touch-driving regions. Conductive lines connected to the common electrode blocks are placed under the common electrode blocks and the pixel electrodes of the pixels, and they are routed across the active area, directly toward an inactive area where drive-integrated circuits are located. The conductive lines are positioned under one or more planarization layers, and are connected to the corresponding common electrode blocks via one or more contact holes.

Abstract translation: 触摸识别启用显示面板包括用作触摸感测区域和/或触摸驱动区域的多个公共电极块。 连接到公共电极块的导电线被放置在公共电极块和像素的像素电极之下，并且它们被直接穿过有源区域路由到驱动集成电路所在的无效区域。 导线位于一个或多个平坦化层之下，并且经由一个或多个接触孔连接到相应的公共电极块。