Prefetch hardware efficiency via prefetch hint instructions
    1.
    发明授权
    Prefetch hardware efficiency via prefetch hint instructions 有权
    通过预取提示指令预取硬件效率

    公开(公告)号:US07533242B1

    公开(公告)日:2009-05-12

    申请号:US11279880

    申请日:2006-04-15

    IPC分类号: G06F9/26

    摘要: A software agent assembles prefetch hint instructions or prefixes defined in an instruction set architecture, the instructions/prefixes conveying prefetch hint information to a processor enabled to execute instructions according to the instruction set architecture. The prefetch hints are directed to control operation of one or more hardware memory prefetcher units included in the processor, providing for increased efficiency in memory prefetching operations. The hints may optionally provide any combination of parameters describing a memory reference traffic pattern to search for, when to begin searching, when to terminate prefetching, and how aggressively to prefetch. Thus the hardware prefetchers are enabled to make improved traffic prediction, providing more accurate results using reduced hardware resources. The hints may include any combination of specific pattern hints (one/two/N-dimensional strides, indirect, and indirect-stride), modifiers including sparse and region, and a prefetch-stop directive. The parameters may include any combination of a count, a priority and a ramp.

    摘要翻译: 软件代理装配在指令集架构中定义的预取提示指令或前缀,指令/前缀将预取提示信息传送到能够根据指令集架构执行指令的处理器。 预取提示旨在控制包括在处理器中的一个或多个硬件存储器预取器单元的操作,从而提高存储器预取操作的效率。 提示可以可选地提供描述存储器参考流量模式的参数的任何组合以搜索,何时开始搜索,何时终止预取,以及如何积极地预取。 因此,硬件预取器能够进行改进的流量预测,使用减少的硬件资源提供更准确的结果。 提示可以包括特定模式提示(一/二/ N维步幅,间接和间接步幅),包括稀疏和区域的修饰符以及预取停止指令的任何组合。 这些参数可以包括计数,优先级和斜坡的任何组合。

    Virtual core management
    2.
    发明授权
    Virtual core management 有权
    虚拟核心管理

    公开(公告)号:US08225315B1

    公开(公告)日:2012-07-17

    申请号:US11933319

    申请日:2007-10-31

    IPC分类号: G06F9/455 G06F15/76

    摘要: A virtual core management system including a physical core and a first virtual core including a collection of logical states associated with execution of a first program. The first virtual core is mapped to the physical core. The virtual core management system further includes a second virtual core including a collection of logical states associated with execution of a second program, and a virtual core management component configured to unmap the first virtual core from the physical core and map the second virtual core to the physical core in response to the virtual core management component detecting that the physical core is idle.

    摘要翻译: 一种包括物理核心和第一虚拟核心的虚拟核心管理系统,包括与执行第一程序相关联的逻辑状态的集合。 第一个虚拟内核映射到物理内核。 虚拟核心管理系统还包括第二虚拟核心,其包括与执行第二程序相关联的逻辑状态的集合,虚拟核心管理组件被配置为从物理核心取消映射第一虚拟核心并将第二虚拟核心映射到 响应虚拟核心管理组件检测物理内核空闲的物理核心。

    Virtual core management
    3.
    发明授权
    Virtual core management 有权
    虚拟核心管理

    公开(公告)号:US07797512B1

    公开(公告)日:2010-09-14

    申请号:US11933297

    申请日:2007-10-31

    IPC分类号: G06F9/46

    摘要: A virtual core management system including one or more physical cores and one or more virtual cores. Each virtual core respectively includes a collection of logical states associated with execution of a corresponding program. The virtual core management system further includes one or more interrupt controllers configured to send one or more interrupt signals to interrupt execution of a corresponding program associated with at least one of the one or more virtual cores, and a virtual core management component configured to map the at least one virtual core to one of the one or more physical cores and route the one or more interrupt signals to the corresponding physical core.

    摘要翻译: 包括一个或多个物理核心和一个或多个虚拟核心的虚拟核心管理系统。 每个虚拟核心分别包括与相应程序的执行相关联的逻辑状态的集合。 虚拟核心管理系统还包括一个或多个中断控制器,其被配置为发送一个或多个中断信号以中断与一个或多个虚拟核心中的至少一个虚拟核心相关联的对应程序的执行;以及虚拟核心管理组件, 至少一个虚拟内核到一个或多个物理核心中的一个,并将一个或多个中断信号路由到相应的物理核心。

    Virtual core remapping based on temperature
    5.
    发明授权
    Virtual core remapping based on temperature 有权
    基于温度的虚拟核心重映射

    公开(公告)号:US08281308B1

    公开(公告)日:2012-10-02

    申请号:US11933199

    申请日:2007-10-31

    IPC分类号: G06F9/455

    摘要: A virtual core management system including a first physical core and a second physical core, and a virtual core including a collection of logical states associated with execution of a program. The virtual core management system further includes a first temperature sensor configured to sense a temperature of the first physical core and a second temperature sensor configured to sense a temperature of the second physical core, and a virtual core management component configured to map the virtual core to one of the first physical core and the second physical core based on at least one of the temperature of the first physical core and the temperature of the second physical core.

    摘要翻译: 包括第一物理核心和第二物理核心的虚拟核心管理系统以及包括与执行程序相关联的逻辑状态的集合的虚拟核心。 虚拟核心管理系统还包括配置成感测第一物理核心的温度的第一温度传感器和被配置为感测第二物理核心的温度的第二温度传感器,以及配置成将虚拟核心映射到 基于第一物理核心的温度和第二物理核心的温度中的至少一个的第一物理核心和第二物理核心之一。

    Adaptive computing ensemble microprocessor architecture
    6.
    发明授权
    Adaptive computing ensemble microprocessor architecture 有权
    自适应计算集成微处理器架构

    公开(公告)号:US07389403B1

    公开(公告)日:2008-06-17

    申请号:US11277761

    申请日:2006-03-29

    IPC分类号: G06F9/38

    摘要: An Adaptive Computing Ensemble (ACE) includes a plurality of flexible computation units as well as an execution controller to allocate the units to Computing Ensembles (CEs) and to assign threads to the CEs. The units may be any combination of ACE-enabled units, including instruction fetch and decode units, integer execution and pipeline control units, floating-point execution units, segmentation units, special-purpose units, reconfigurable units, and memory units. Some of the units may be replicated, e.g. there may be a plurality of integer execution and pipeline control units. Some of the units may be present in a plurality of implementations, varying by performance, power usage, or both. The execution controller dynamically alters the allocation of units to threads in response to changing performance and power consumption observed behaviors and requirements. The execution controller also dynamically alters performance and power characteristics of the ACE-enabled units, according to the observed behaviors and requirements.

    摘要翻译: 自适应计算集合(ACE)包括多个灵活的计算单元以及将单元分配给计算集合(CE)并将线程分配给CE的执行控制器。 单元可以是启用ACE的单元的任何组合,包括指令提取和解码单元,整数执行和流水线控制单元,浮点执行单元,分段单元,专用单元,可重配置单元和存储单元。 一些单位可能被复制,例如 可以存在多个整数执行和流水线控制单元。 一些单元可以存在于由性能,功率使用或两者变化的多个实现中。 响应于观察到的行为和要求的性能和功耗的变化,执行控制器动态地改变单元对线程的分配。 执行控制器还根据观察到的行为和要求动态地改变启用ACE的单元的性能和功率特性。

    Flag management in processors enabled for speculative execution of micro-operation traces
    7.
    发明授权
    Flag management in processors enabled for speculative execution of micro-operation traces 有权
    处理器中的标志管理能够推测微操作轨迹的执行

    公开(公告)号:US07568089B1

    公开(公告)日:2009-07-28

    申请号:US11553458

    申请日:2006-10-26

    IPC分类号: G06F9/30

    摘要: Managing speculative execution via groups of actions corresponding to atomic traces enables efficient processing of flag-related actions, as atomic traces advantageously enable single checkpoints of flags at trace boundaries. Flag restoration from checkpoints for trace aborts uses a flag checkpoint table to store flag checkpoints, each corresponding to an atomic trace. The table is accessed for flag restoration in response to a trace abort. In a first technique, a corresponding flag checkpoint is stored in response to trace renaming, and the flag checkpoints are updated as flags are modified. Flags are restored from the flag checkpoint corresponding to an aborted atomic trace. In a second technique, a corresponding flag checkpoint is allocated to an invalid state in response to trace renaming, and initialized on-demand when flags are first modified in accordance with the atomic trace. Flags are restored from the oldest flag checkpoint starting from an aborted atomic trace.

    摘要翻译: 通过与原子轨迹对应的动作组来管理推测性执行,可以有效地处理与标志相关的动作,因为原子轨迹有利地使踪迹边界上的标志的单个检查点。 用于跟踪中止的检查点的标志恢复使用标志检查点表来存储标志检查点,每个对应于原子轨迹。 该表被访问用于响应于跟踪中止的标志恢复。 在第一种技术中,响应于跟踪重命名而存储对应的标志检查点,并且随着标志被修改,标志检查点被更新。 从对应于中止的原子轨迹的标志检查点恢复标志。 在第二种技术中,响应于跟踪重命名,对应的标志检查点被分配到无效状态,并且当根据原子轨迹首先修改标志时按需初始化。 从废弃的原子轨迹开始,从最旧的标志检查点恢复标志。

    Prediction of data values read from memory by a microprocessor using the storage destination of a load operation
    8.
    发明授权
    Prediction of data values read from memory by a microprocessor using the storage destination of a load operation 有权
    使用加载操作的存储目的地的微处理器从存储器读取的数据值的预测

    公开(公告)号:US07788473B1

    公开(公告)日:2010-08-31

    申请号:US11646008

    申请日:2006-12-26

    IPC分类号: G06F9/30

    摘要: Prediction of data values to be read from memory by a microprocessor for load operations. In one aspect, a method for predicting a data value that will result from a load operation to be executed by the microprocessor includes accessing an entry in a load value prediction table that stores a predicted data value corresponding to the load operation. The predicted data value is stored in a physical storage destination of the microprocessor to be available as a result of the load operation without waiting for execution of the load operation to complete. The storage destination is the destination for a loaded data value resulting from executing the load operation.

    摘要翻译: 预测由微处理器从存储器读取的数据值以进行加载操作。 一方面,用于预测由微处理器执行的加载操作产生的数据值的方法包括访问存储与加载操作对应的预测数据值的载入值预测表中的条目。 预测数据值被存储在微处理器的物理存储目的地中,作为加载操作的结果可用,而不等待执行加载操作完成。 存储目的地是由执行加载操作产生的加载数据值的目的地。

    Virtual core management
    9.
    发明授权
    Virtual core management 有权
    虚拟核心管理

    公开(公告)号:US07802073B1

    公开(公告)日:2010-09-21

    申请号:US11781726

    申请日:2007-07-23

    IPC分类号: G06F9/50

    CPC分类号: G06F9/3851

    摘要: The present disclosure provides methods and systems adapted for use with a processor having one or more physical cores. The methods and systems include a virtual core management component adapted to map one or more virtual cores to at least one of the physical cores to enable execution of one or more programs by the at least one physical core. The one or more virtual cores include one or more logical states associated with the execution of the one or more programs. The methods and systems may include a memory component adapted to store the one or more virtual cores. The virtual core management component may be adapted to transfer the one or more virtual cores from the memory component to the at least one physical core.

    摘要翻译: 本公开提供适于与具有一个或多个物理核心的处理器一起使用的方法和系统。 所述方法和系统包括适于将一个或多个虚拟核心映射到所述物理核心中的至少一个的虚拟核心管理组件,以使所述至少一个物理核心能够执行一个或多个程序。 一个或多个虚拟核心包括与一个或多个程序的执行相关联的一个或多个逻辑状态。 方法和系统可以包括适于存储一个或多个虚拟核的存储器组件。 虚拟核心管理组件可以适于将一个或多个虚拟核心从存储器组件传送到至少一个物理核心。

    Software hint to specify the preferred branch prediction to use for a branch instruction
    10.
    发明授权
    Software hint to specify the preferred branch prediction to use for a branch instruction 有权
    软件提示指定用于分支指令的首选分支预测

    公开(公告)号:US07673122B1

    公开(公告)日:2010-03-02

    申请号:US11306000

    申请日:2005-12-16

    IPC分类号: G06F9/00

    CPC分类号: G06F9/3846 G06F9/3848

    摘要: Software hints embedded in branch instructions direct selection of one of a plurality of branch predictors to use when processing the branch instructions, leading to improved branch prediction (i.e. fewer mis-predictions) over conventional schemes. A software agent assembles branch instructions having associated respective branch predictor control fields compatible with a branch predictor selector and a plurality of branch predictors. Each branch predictor control field is used to perform branch predictor selection, branch predictor control, or both. Branch predictor selection enables selective branch prediction according to an appropriate one of the branch predictors as determined by the software agent by examining context surrounding the branch instruction. Branch predictor control enables control of operation of one or more of the branch predictors. For example, a history-based branch predictor may be instructed to provide branch prediction according to a history-depth specified by the branch predictor control.

    摘要翻译: 嵌入分支指令中的软件提示直接选择在处理分支指令时使用的多个分支预测器中的一个,导致与常规方案相比改进的分支预测(即较少的误预测)。 软件代理装配具有与分支预测器选择器和多个分支预测器兼容的相关联的相应分支预测器控制字段的分支指令。 每个分支预测器控制字段用于执行分支预测器选择,分支预测器控制或两者。 分支预测器选择通过检查分支指令周围的上下文,根据由软件代理确定的适当的一个分支预测器启用选择性分支预测。 分支预测器控制使得能够控制一个或多个分支预测器的操作。 例如,可以指示基于历史的分支预测器,以根据由分支预测器控制指定的历史深度来提供分支预测。