公开(公告)号：US20110042685A1

公开(公告)日：2011-02-24

申请号：US12543473

申请日：2009-08-18

申请人： Li Wang ,  Sima Dimitrijev ,  Alan Iacopi ,  Jisheng Han ,  Leonie Hold ,  Philip Tanner ,  Fred Kong ,  Herbert Harrison

发明人： Li Wang ,  Sima Dimitrijev ,  Alan Iacopi ,  Jisheng Han ,  Leonie Hold ,  Philip Tanner ,  Fred Kong ,  Herbert Harrison

IPC分类号： H01L29/24 ,  C30B23/00

CPC分类号： C30B25/165 ,  C30B29/36 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/0262

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, substrates, and methods to form silicon carbide structures, including epitaxial layers, by supplying sources of silicon and carbon with sequential emphasis. In at least some embodiments, a method of forming an epitaxial layer of silicon carbide can include depositing a layer on a substrate in the presence of a silicon source, and purging gaseous materials subsequent to depositing the layer. Further, the method can include converting the layer into a sub-layer of silicon carbide in the presence of a carbon source, and purging other gaseous materials subsequent to converting the layer. The presence of the silicon source can be independent of the presence of the carbon source. In some embodiments, dopants, such as n-type dopants, can be introduced during the formation of the epitaxial layer of silicon carbide.

摘要翻译： 本发明的实施例一般涉及半导体和半导体制造技术，更具体地涉及通过以顺序强调提供硅和碳的源来形成包括外延层的碳化硅结构的器件，集成电路，衬底和方法。 在至少一些实施例中，形成碳化硅外延层的方法可以包括在硅源的存在下在衬底上沉积层，以及在沉积层之后吹扫气态材料。 此外，该方法可以包括在碳源的存在下将层转化为碳化硅的子层，以及在转换层之后吹扫其它气态材料。 硅源的存在可以独立于碳源的存在。 在一些实施例中，可以在形成碳化硅外延层期间引入掺杂剂，例如n型掺杂剂。

公开(公告)号：US20120056194A1

公开(公告)日：2012-03-08

申请号：US12876028

申请日：2010-09-03

申请人： Sima Dimitrijev ,  Li Wang ,  Jisheng Han ,  Alan Iacopi ,  Leonie Hold ,  Philip Tanner ,  Fred Kong ,  Herbert Barry Harrison

发明人： Sima Dimitrijev ,  Li Wang ,  Jisheng Han ,  Alan Iacopi ,  Leonie Hold ,  Philip Tanner ,  Fred Kong ,  Herbert Barry Harrison

IPC分类号： H01L29/24 ,  H01L21/20

CPC分类号： H01L29/94 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1608 ,  H01L29/86

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, substrates, wafers and methods to form barrier structures to facilitate formation of silicon carbide epitaxy on a substrate, such as a silicon-based substrate, for fabricating various silicon carbide-based semiconductor devices, including silicon carbide-based memory elements and cells. In some embodiments, a semiconductor wafer includes a silicon substrate, a barrier-seed layer disposed over the silicon substrate, and a silicon carbide layer formed over the barrier-seed layer. The semiconductor wafer can be used to form a variety of SiC-based semiconductor devices. In one embodiment, a silicon carbide-based memory element is formed to include barrier-seed layer, multiple silicon carbide layers formed over the barrier-seed layer, and a dielectric layer formed over the multiple silicon carbide layers.

摘要翻译： 本发明的实施例一般涉及半导体和半导体制造技术，更具体地，涉及用于形成阻挡结构以便于在诸如硅基底层之类的衬底上形成碳化硅外延的器件，集成电路，衬底，晶片和方法 ，用于制造各种基于碳化硅的存储元件和电池的基于碳化硅的半导体器件。 在一些实施例中，半导体晶片包括硅衬底，设置在硅衬底上的阻挡种子层和形成在阻挡种子层上的碳化硅层。 半导体晶片可用于形成各种SiC基半导体器件。 在一个实施例中，形成基于碳化硅的存储元件以包括阻挡种子层，在阻挡种子层上形成的多个碳化硅层以及形成在多个碳化硅层上的电介质层。

公开(公告)号：US20110042686A1

公开(公告)日：2011-02-24

申请号：US12543478

申请日：2009-08-18

申请人： Jisheng Han ,  Sima Dimitrijev ,  Li Wang ,  Philip Tanner ,  Leonie Hold ,  Alan Iacopi ,  Fred Kong ,  Herbert Barry Harrison

发明人： Jisheng Han ,  Sima Dimitrijev ,  Li Wang ,  Philip Tanner ,  Leonie Hold ,  Alan Iacopi ,  Fred Kong ,  Herbert Barry Harrison

IPC分类号： H01L29/24 ,  H01L21/04

CPC分类号： H01L21/0262 ,  C30B25/02 ,  C30B29/36 ,  H01L21/02529 ,  H01L21/02579

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, substrates, and methods to form silicon carbide structures, including doped epitaxial layers (e.g., P-doped silicon carbide epitaxial layers), by supplying sources of silicon and carbon with sequential emphasis. In some embodiments, a method of forming an epitaxial layer of silicon carbide can include depositing a layer in the presence of a silicon source, and purging gaseous materials subsequent to depositing the layer. Further, the method can include converting the layer into a sub-layer of silicon carbide in the presence of a carbon source and a dopant, and purging other gaseous materials. In some embodiments, the presence of the silicon source can be independent of the presence of the carbon source and/or the dopant.

摘要翻译： 本发明的实施例一般涉及半导体和半导体制造技术，更具体地涉及用于形成碳化硅结构的器件，集成电路，衬底和方法，包括掺杂的外延层（例如，P掺杂的碳化硅外延层），由 依次强调硅和碳的供应来源。 在一些实施例中，形成碳化硅外延层的方法可以包括在硅源的存在下沉积层，以及在沉积层之后吹扫气态材料。 此外，该方法可以包括在碳源和掺杂剂的存在下将层转化为碳化硅的子层，并且清除其它气态材料。 在一些实施例中，硅源的存在可以独立于碳源和/或掺杂剂的存在。

公开(公告)号：US20110272707A1

公开(公告)日：2011-11-10

申请号：US12775419

申请日：2010-05-06

申请人： Sima Dimitrijev ,  Li Wang ,  Jisheng Han ,  Alan Iacopi ,  Herbert Barry Harrison

发明人： Sima Dimitrijev ,  Li Wang ,  Jisheng Han ,  Alan Iacopi ,  Herbert Barry Harrison

IPC分类号： H01L29/24 ,  H01L21/20

CPC分类号： H01L21/02529 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/0262 ,  H01L21/02658

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, substrates, wafers and methods to form film structures to facilitate formation of silicon carbide epitaxy on a substrate, such as a silicon-based substrate. In some embodiments, a method of preparing a substrate for silicon carbide epitaxial layer formation can include forming an ultrathin layer of oxide that is configured to inhibit contaminants from interacting with a silicon-based substrate. Further, the method can include forming a carbonized film on the silicon-based substrate that is configured to inhibit contaminants from interacting with the silicon-based substrate. The carbonized film can be configured to be transitory as fabrication parameters are modified to form an epitaxial layer of silicon carbide.

摘要翻译： 本发明的实施方案一般涉及半导体和半导体制造技术，更具体地涉及用于形成薄膜结构以便于在诸如硅基底材的基底上形成碳化硅外延的器件，集成电路，衬底，晶片和方法 。 在一些实施例中，制备用于碳化硅外延层形成的衬底的方法可包括形成被配置为抑制污染物与硅基衬底相互作用的氧化物超薄层。 此外，该方法可以包括在硅基衬底上形成碳化膜，其被配置为抑制污染物与硅基衬底相互作用。 当制造参数被修改以形成碳化硅的外延层时，碳化膜可以被配置为短暂的。

公开(公告)号：US20100149852A1

公开(公告)日：2010-06-17

申请号：US12639925

申请日：2009-12-16

申请人： Sima Dimitrijev ,  Herbert Barry Harrison

发明人： Sima Dimitrijev ,  Herbert Barry Harrison

IPC分类号： G11C11/00

CPC分类号： G11C13/0009 ,  G11C11/36 ,  G11C11/56 ,  G11C13/00 ,  G11C2213/33

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, memory cells and arrays, and methods to use silicon carbide structures to retain amounts of charge indicative of a resistive state in, for example, a charge-controlled resistor of a memory cell. In some embodiments, a memory cell comprises a silicon carbide structure including a charge reservoir configured to store an amount of charge carriers constituting a charge cloud. The amount of charge carriers in the charge cloud can represent a data value. Further, the memory cell includes a resistive element in communication with the charge reservoir and is configured to provide a resistance as a function of the amount of charge carriers in the charge reservoir. The charge reservoir is configured to modulate the size of the charge cloud to change the data value.

摘要翻译： 本发明的实施例一般涉及半导体和半导体制造技术，更具体地，涉及器件，集成电路，存储器单元和阵列，以及使用碳化硅结构来保持表示电阻状态的电荷量的方法，例如， 存储单元的电荷控制电阻器。 在一些实施例中，存储器单元包括碳化硅结构，其包括被配置为存储构成电荷云的一定量的电荷载流子的电荷储存器。 电荷云中的电荷载体的数量可以表示数据值。 此外，存储单元包括与电荷储存器连通的电阻元件，并且被配置为提供作为电荷储存器中的电荷载体的量的函数的电阻。 电荷储存器被配置为调制电荷云的尺寸以改变数据值。

公开(公告)号：US20060007727A1

公开(公告)日：2006-01-12

申请号：US10526382

申请日：2003-09-12

申请人： Barry Harrison ,  Sima Dimitrijev

发明人： Barry Harrison ,  Sima Dimitrijev

IPC分类号： G11C11/00

CPC分类号： H01L27/11521 ,  G11C16/04 ,  H01L21/8213 ,  H01L27/115

摘要： A one-transistor (1T) NVRAM cell that utilizes silicon carbide (SiC) to provide both isolation of non equilibrium charge, and fast and non destructive charging/discharging. To enable sensing of controlled resistance (and many memory levels) rather than capacitance, the cell incorporates a memory transistor that can be implemented in either silicon or Sic. The 1T cell has diode isolation to enable implementation of the architectures used in the present flash memories, and in particular the NOR and the NAND arrays. The 1T cell with diode isolation is not limited to SiC diodes. The fabrication method includes the step of forming a nitrided silicon oxide gate on the Sic substrate and subsequently carrying out the ion implantation and then finishing the formation of a self aligned MOSFET.

摘要翻译： 使用碳化硅（SiC）的单晶体管（1T）NVRAM电池提供非平衡电荷的隔离以及快速和无损的充电/放电。 为了实现受控电阻（和许多存储器电平）而不是电容的感测，该电池结合了可以在硅或Sic中实现的存储晶体管。 1T单元具有二极管隔离以实现本闪存中使用的架构，特别是NOR和NAND阵列。 具有二极管隔离的1T电池不限于SiC二极管。 该制造方法包括在Sic衬底上形成氮化硅氧化物栅极并随后执行离子注入并随后完成自对准MOSFET的形成的步骤。

公开(公告)号：US08189364B2

公开(公告)日：2012-05-29

申请号：US12639925

申请日：2009-12-16

申请人： Sima Dimitrijev ,  Herbert Barry Harrison

发明人： Sima Dimitrijev ,  Herbert Barry Harrison

IPC分类号： G11C11/00

CPC分类号： G11C13/0009 ,  G11C11/36 ,  G11C11/56 ,  G11C13/00 ,  G11C2213/33

摘要： Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, memory cells and arrays, and methods to use silicon carbide structures to retain amounts of charge indicative of a resistive state in, for example, a charge-controlled resistor of a memory cell. In some embodiments, a memory cell comprises a silicon carbide structure including a charge reservoir configured to store an amount of charge carriers constituting a charge cloud. The amount of charge carriers in the charge cloud can represent a data value. Further, the memory cell includes a resistive element in communication with the charge reservoir and is configured to provide a resistance as a function of the amount of charge carriers in the charge reservoir. The charge reservoir is configured to modulate the size of the charge cloud to change the data value.

摘要翻译： 本发明的实施例一般涉及半导体和半导体制造技术，更具体地，涉及器件，集成电路，存储器单元和阵列，以及使用碳化硅结构来保持表示电阻状态的电荷量的方法，例如， 存储单元的电荷控制电阻器。 在一些实施例中，存储器单元包括碳化硅结构，其包括被配置为存储构成电荷云的一定量的电荷载流子的电荷储存器。 电荷云中的电荷载体的数量可以表示数据值。 此外，存储单元包括与电荷储存器连通的电阻元件，并且被配置为提供作为电荷储存器中的电荷载体的量的函数的电阻。 电荷储存器被配置为调制电荷云的尺寸以改变数据值。

公开(公告)号：US07362609B2

公开(公告)日：2008-04-22

申请号：US10526382

申请日：2003-09-12

申请人： Barry H. Harrison ,  Sima Dimitrijev

发明人： Barry H. Harrison ,  Sima Dimitrijev

IPC分类号： G11C11/36

CPC分类号： H01L27/11521 ,  G11C16/04 ,  H01L21/8213 ,  H01L27/115

摘要： A one-transistor (1T) NVRAM cell that utilizes silicon carbide (SiC) to provide both isolation of non equilibrium charge, and fast and non destructive charging/discharging. To enable sensing of controlled resistance (and many memory levels) rather than capacitance, the cell incorporates a memory transistor that can be implemented in either silicon or Sic. The 1T cell has diode isolation to enable implementation of the architectures used in the present flash memories, and in particular the NOR and the NAND arrays. The 1T cell with diode isolation is not limited to SiC diodes. The fabrication method includes the step of forming a nitrided silicon oxide gate on the Sic substrate and subsequently carrying out the ion implantation and then finishing the formation of a self aligned MOSFET.

摘要翻译： 使用碳化硅（SiC）的单晶体管（1T）NVRAM电池提供非平衡电荷的隔离以及快速和无损的充电/放电。 为了实现受控电阻（和许多存储器电平）而不是电容的感测，该电池结合了可以在硅或Sic中实现的存储晶体管。 1T单元具有二极管隔离以实现本闪存中使用的架构，特别是NOR和NAND阵列。 二极管隔离的1T电池不限于SiC二极管。 该制造方法包括在Sic衬底上形成氮化硅氧化物栅极并随后执行离子注入并随后完成自对准MOSFET的形成的步骤。