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    Memory devices for pattern matching
    1.
    发明授权
    Memory devices for pattern matching 有权

    公开(公告)号：US11205481B2

    公开(公告)日：2021-12-21

    申请号：US17218243

    申请日：2021-03-31

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Vishal Sarin

    IPC: G11C15/04 ,  G11C16/10 ,  G11C16/04 ,  H01L27/00 ,  G11C13/06 ,  G11C29/52

    Abstract: Memory devices might include control circuitry that, when checking for a match of a stored digit of data and a received digit of data, might be configured to cause the memory device to apply a first voltage level to a control gate of a first memory cell of a memory cell pair, apply a second voltage level different than the first voltage level to a control gate of a second memory cell of that memory cell pair, determine whether that memory cell pair is deemed to be activated or deactivated in response to applying the first and second voltage levels, and deem a match between the stored digit of data and a received digit of data in response, in part, to whether that memory cell pair is deemed to be deactivated.

    METHODS OF OPERATING A MEMORY DEVICE COMPARING INPUT DATA TO DATA STORED IN MEMORY CELLS COUPLED TO A DATA LINE
    2.
    发明申请
    METHODS OF OPERATING A MEMORY DEVICE COMPARING INPUT DATA TO DATA STORED IN MEMORY CELLS COUPLED TO A DATA LINE 审中-公开

    公开(公告)号：US20190325971A1

    公开(公告)日：2019-10-24

    申请号：US16458384

    申请日：2019-07-01

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Kenneth J. Eldredge ,  Frankie F. Roohparvar ,  Luca De Santis ,  Tommaso Vali

    IPC: G11C16/28 ,  G11C16/04 ,  G11C15/00 ,  G11C15/04

    Abstract: Methods of operating a memory device include comparing input data to data stored in memory cells coupled to a data line, comparing a representation of a level of current in the data line to a reference, and determining that the input data potentially matches the data stored in the memory cells when the representation of the level of current in the data line is less than the reference. Methods of operating a memory device further include comparing input data to first data and to second data stored in memory cells coupled to a first data line or to a second data line, respectively, comparing representations of the levels of current in the first data line and in the second data line to a first reference and to a different second reference, and deeming one to be a closer match to the input data in response to results of the comparisons.

    Methods and apparatus for pattern matching using redundant memory elements
    3.
    发明授权
    Methods and apparatus for pattern matching using redundant memory elements 有权

    公开(公告)号：US10141055B2

    公开(公告)日：2018-11-27

    申请号：US15841490

    申请日：2017-12-14

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Vishal Sarin

    IPC: G11C15/00 ,  G11C15/04 ,  G11C16/10 ,  G11C16/04 ,  G11C29/52

    Abstract: Methods include receiving a pattern to be searched in a memory having a plurality of sets of memory elements with each set coupled to a separate data line and corresponding to a same set of bit positions of the pattern. Methods further include receiving a pattern of data to be programmed into a memory, programming a first data state into one memory cell of each cell pair of a plurality of cell pairs of a memory array, and programing a second data state into another memory cell of each cell pair of the plurality of cell pairs for each bit position of the pattern. Memory configured to facilitate such methods include a plurality of cell pairs, each cell pair of the plurality of cell pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory.

    MEMORY AS A PROGRAMMABLE LOGIC DEVICE
    6.
    发明申请
    MEMORY AS A PROGRAMMABLE LOGIC DEVICE 有权

    公开(公告)号：US20170365342A1

    公开(公告)日：2017-12-21

    申请号：US15690359

    申请日：2017-08-30

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Frankie F. Roohparvar

    IPC: G11C16/10 ,  G11C16/04 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3418

    Abstract: Methods for operating a memory, and memory configured to perform similar methods, include programming a first series string of memory cells of a first group of memory cells such that pairs of complementary memory cells have complementary states to provide a first minterm, the first minterm comprising a plurality of first variables wherein each variable is enabled responsive to a state of its respective memory cell, and programming a second series string of memory cells of a second group of memory cells such that pairs of complementary memory cells have complementary states to provide a second minterm, the second minterm comprising the first minterm that is enabled responsive to the state of its respective memory cell, the second minterm further comprising a plurality of second variables that are each enabled responsive to the state of their respective memory cell.

    Neural network in a memory device
    8.
    发明授权
    Neural network in a memory device 有权
    神经网络在存储器中

    公开(公告)号：US09430735B1

    公开(公告)日：2016-08-30

    申请号：US13774553

    申请日：2013-02-22

    Applicant: Micron Technology, Inc.

    Inventor： Tommaso Vali ,  Kenneth J. Eldredge ,  Frankie F. Roohparvar ,  Luca De Santis

    IPC: G06F15/00 ,  G06F15/18 ,  G06N3/04

    CPC classification number: G11C16/26 ,  G06N3/04 ,  G06N3/0454 ,  G06N3/063 ,  G11C7/1006 ,  G11C7/106 ,  G11C16/0483 ,  G11C16/08

    Abstract: Devices, systems and methods for operating a memory device facilitating a neural network in a memory device are disclosed. In at least one embodiment, the memory device is operated having a feed-ward neural network operating scheme. In at least one other embodiment, memory cells are operated to emulate a number of neural models to facilitate one or more neural network operating characteristics in the memory device.

    Abstract translation: 公开了用于操作促进存储器件中的神经网络的存储器件的装置，系统和方法。 在至少一个实施例中，操作存储器装置具有馈送区神经网络操作方案。 在至少一个其他实施例中，存储器单元被操作以模拟许多神经模型以促进存储器件中的一个或多个神经网络操作特性。

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