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公开(公告)号：US20130138843A1
公开(公告)日：2013-05-30
申请号：US13729172
申请日：2012-12-28
IPC分类号： G06F13/24
摘要： In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于处理从主机处理器接收的注册消息的方法，其中所述注册消息将关于设备的轮询操作从主机处理器委托给另一个组件。 来自消息的信息可以存储在轮询表中，并且组件可以发送读请求以轮询该设备并且基于该设备的状态向轮询处理器报告轮询的结果。 描述和要求保护其他实施例。
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公开(公告)号：US08364862B2
公开(公告)日：2013-01-29
申请号：US12482614
申请日：2009-06-11
IPC分类号： G06F3/00
摘要： In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于处理从主机处理器接收的注册消息的方法，其中所述注册消息将关于设备的轮询操作从主机处理器委托给另一个组件。 来自消息的信息可以存储在轮询表中，并且组件可以发送读请求以轮询该设备并且基于该设备的状态向轮询处理器报告轮询的结果。 描述和要求保护其他实施例。
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公开(公告)号：US20100318693A1
公开(公告)日：2010-12-16
申请号：US12482614
申请日：2009-06-11
IPC分类号： G06F3/00
摘要： In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于处理从主机处理器接收的注册消息的方法，其中所述注册消息将关于设备的轮询操作从主机处理器委托给另一个组件。 来自消息的信息可以存储在轮询表中，并且组件可以发送读请求以轮询该设备并且基于该设备的状态向轮询处理器报告轮询的结果。 描述和要求保护其他实施例。
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公开(公告)号：US20100191920A1
公开(公告)日：2010-07-29
申请号：US12360533
申请日：2009-01-27
申请人： Zhen Fang , David J. Harriman , Michael W. Leddige
发明人： Zhen Fang , David J. Harriman , Michael W. Leddige
CPC分类号： G06F12/0835 , G06F12/0888 , G06F12/1027
摘要： In one embodiment, the present invention includes a method for receiving a memory request from a device coupled to an input/output (IO) interconnect, accessing a mapping table associated with the IO interconnect to determine if an address range including an address of the memory request is coherent, and if so, sending the memory request and a coherency indicator to indicate the coherent state of data at the address, otherwise sending the memory request and the coherency indicator to indicate a non-coherent state. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于从耦合到输入/输出（IO）互连的设备接收存储器请求的方法，访问与IO互连关联的映射表，以确定包括存储器的地址的地址范围 请求是一致的，如果是，则发送存储器请求和一致性指示符以指示地址处的数据的相干状态，否则发送存储器请求和一致性指示符以指示非相干状态。 描述和要求保护其他实施例。
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公开(公告)号：US08631208B2
公开(公告)日：2014-01-14
申请号：US12360533
申请日：2009-01-27
申请人： Zhen Fang , David J. Harriman , Michael W. Leddige
发明人： Zhen Fang , David J. Harriman , Michael W. Leddige
IPC分类号： G06F13/00
CPC分类号： G06F12/0835 , G06F12/0888 , G06F12/1027
摘要： In one embodiment, the present invention includes a method for receiving a memory request from a device coupled to an input/output (IO) interconnect, accessing a mapping table associated with the IO interconnect to determine if an address range including an address of the memory request is coherent, and if so, sending the memory request and a coherency indicator to indicate the coherent state of data at the address, otherwise sending the memory request and the coherency indicator to indicate a non-coherent state. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于从耦合到输入/输出（IO）互连的设备接收存储器请求的方法，访问与IO互连关联的映射表，以确定包括存储器的地址的地址范围 请求是一致的，如果是，则发送存储器请求和一致性指示符以指示地址处的数据的相干状态，否则发送存储器请求和一致性指示符以指示非相干状态。 描述和要求保护其他实施例。
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6.发明授权公开(公告)号：US09026698B2
公开(公告)日：2015-05-05
申请号：US13844323
申请日：2013-03-15
CPC分类号： G06F13/423 , G06F3/067 , G06F9/44 , G06F9/4411 , G06F13/385 , H04L63/08
摘要： Techniques and mechanisms for providing access to a function with an input/output (I/O) device. In an embodiment, a main memory of a computer system including the I/O device stores a function-context data structure associating a function with a context for an access to the function. The I/O device stores a configuration for the I/O device to provide the function. In another embodiment, the software process exchanges information with the function-context data structure for the access to the function. The I/O device performs a synchronization of the function-context data structure and the configuration data structure with respect to one another, wherein the function-context data structure operates as a register level interface which interfaces the I/O device and the software process with one another.
摘要翻译： 提供使用输入/输出（I / O）设备访问功能的技术和机制。 在一个实施例中，包括I / O设备的计算机系统的主存储器存储将功能与用于访问功能的上下文相关联的功能上下文数据结构。 I / O设备存储I / O设备的配置以提供功能。 在另一实施例中，软件过程与功能上下文数据结构交换信息以访问该功能。 I / O设备相对于彼此执行功能上下文数据结构和配置数据结构的同步，其中功能上下文数据结构作为将I / O设备和软件过程接口的寄存器级接口 彼此之间。
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公开(公告)号：US08872546B2
公开(公告)日：2014-10-28
申请号：US13613810
申请日：2012-09-13
申请人： Peng Zou , Fenardi Thenus , David J. Harriman
发明人： Peng Zou , Fenardi Thenus , David J. Harriman
IPC分类号： H03K19/0175
CPC分类号： G01R31/31924
摘要： In one embodiment, a test apparatus includes a field programmable gate array (FPGA) including a first transmitter to communicate first signals according to current mode logic (CML) signaling and a first receiver to receive second signals according to the CML signaling, and an interface circuit to couple the FPGA to a device that is to communicate according to voltage mode signaling. The interface circuit may adapt the first signals communicated by the first transmitter according to the CML signaling to voltage mode signaling signals for receipt by the device. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，测试装置包括现场可编程门阵列（FPGA），其包括根据当前模式逻辑（CML）信令来传送第一信号的第一发射机和根据CML信令接收第二信号的第一接收机，以及接口 电路将FPGA耦合到根据电压模式信号进行通信的设备。 接口电路可以将根据CML信令的由第一发射机传送的第一信号适配成电压模式信令信号，以供设备接收。 描述和要求保护其他实施例。
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公开(公告)号：US20140108686A1
公开(公告)日：2014-04-17
申请号：US14109061
申请日：2013-12-17
申请人： Mahesh Wagh , David J. Harriman
发明人： Mahesh Wagh , David J. Harriman
IPC分类号： G06F13/42
CPC分类号： G06F13/4282 , G06F1/3253 , G06F13/385 , H04Q2213/13003 , Y02D10/151 , Y02D50/20
摘要： In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，可以使用融合协议栈来将通信从第一通信协议统一到第二通信协议，以提供跨物理互连的数据传输。 该堆叠可以并入包括用于包括交易和链路层的第一通信协议的协议栈的装置，以及耦合到协议栈的物理（PHY）单元，以在设备和耦合到装置的设备之间通信 一个物理链接。 该PHY单元可以包括根据第二通信协议的物理单元电路。 描述和要求保护其他实施例。
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公开(公告)号：US20130346635A1
公开(公告)日：2013-12-26
申请号：US13532978
申请日：2012-06-26
申请人： Jeff Morriss , David J. Harriman
发明人： Jeff Morriss , David J. Harriman
IPC分类号： G06F3/00
CPC分类号： G06F13/00 , G06F9/5011 , G06F9/5027 , G06F13/4282 , G06F21/445 , G06F21/73 , G06F2213/0042 , G06F2213/0052 , Y02D10/14 , Y02D10/151
摘要： In one embodiment, the present invention includes an apparatus having a random number generator to generate a random number responsive to a first command from a host controller and a logic to generate a device identifier for the apparatus. The apparatus can provide a reply to the host controller including the random number responsive to an identification request from the host controller corresponding to the device identifier. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括具有随机数发生器的装置，用于响应于来自主机控制器的第一命令产生随机数，以及生成用于该装置的设备标识符的逻辑。 该装置可以向主机控制器提供响应于来自主机控制器的对应于设备标识符的识别请求的随机数的回复。 描述和要求保护其他实施例。
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公开(公告)号：US08385333B2
公开(公告)日：2013-02-26
申请号：US12495500
申请日：2009-06-30
申请人： Kevin Stanton , David J. Harriman
发明人： Kevin Stanton , David J. Harriman
IPC分类号： H04L12/28
CPC分类号： H04L67/1095 , G06F1/14
摘要： A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.
摘要翻译： 一种用于同步跨越网络布置的主设备和目标设备之间的时间的方法和设备，其中所述目标设备通过PCIe互连与主设备通信包括：在第一时间从主设备向目标设备发送第一消息 第一条消息包括消息指示符; 以及在从目标设备到主设备的后续时间接收回复消息，该回复消息包括消息指示符。
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