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公开(公告)号：US20170351637A1
公开(公告)日：2017-12-07
申请号：US15685855
申请日：2017-08-24
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Anand S. Ramalingam , Rajesh Sundaram , Julie M. Walker
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
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公开(公告)号：US20150046611A1
公开(公告)日：2015-02-12
申请号：US13961377
申请日：2013-08-07
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Ramalingam Anandaraj , Rajesh Sundaram , Julie M. Walker
IPC: G06F13/14
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
Abstract translation: 描述了芯片选择的几种系统和方法。 在一种这样的方法中，设备维护两个标识符（ID_a和ID_m）。 当设备接收到命令时，它检查ID_a和ID_m相对于第三参考标识符（ID_s）的值。 如果ID_a或ID_m等于ID_s，则设备执行该命令，否则设备将忽略该命令。 通过使用两种不同的识别方法，系统具有选择激活设备的选项，能够以快速方式选择多个设备和单个设备之间进行选择性切换。 在另一种这样的方法中，设备可以具有存储诸如ID_a的标识信息的持久区域。 因此，系统功能可以独立于与系统中所有设备的初始ID_a分配所需的物理或逻辑组件相关联的任何缺陷/边际。
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公开(公告)号：US09785603B2
公开(公告)日：2017-10-10
申请号：US15212902
申请日：2016-07-18
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Anand S. Ramalingam , Rajesh Sundaram , Julie M. Walker
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
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公开(公告)号：US09996496B2
公开(公告)日：2018-06-12
申请号：US15685855
申请日：2017-08-24
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Anand S. Ramalingam , Rajesh Sundaram , Julie M. Walker
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
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公开(公告)号：US09477616B2
公开(公告)日：2016-10-25
申请号：US13961377
申请日：2013-08-07
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Anand S. Ramalingam , Rajesh Sundaram , Julie M. Walker
IPC: G06F13/14
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
Abstract translation: 描述了芯片选择的几种系统和方法。 在一种这样的方法中，设备维护两个标识符（ID_a和ID_m）。 当设备接收到命令时，它检查ID_a和ID_m相对于第三参考标识符（ID_s）的值。 如果ID_a或ID_m等于ID_s，则设备执行该命令，否则设备将忽略该命令。 通过使用两种不同的识别方法，系统具有选择激活设备的选项，能够以快速方式选择多个设备和单个设备之间进行选择性切换。 在另一种这样的方法中，设备可以具有存储诸如ID_a的标识信息的持久区域。 因此，系统功能可以独立于与系统中所有设备的初始ID_a分配所需的物理或逻辑组件相关联的任何缺陷/边际。
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Patent Agency Ranking
公开(公告)号：US09230666B2
公开(公告)日：2016-01-05
申请号：US14320068
申请日：2014-06-30
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Pranav Kalavade , Doyle Rivers
CPC classification number: G11C16/12 , G11C16/04 , G11C16/0433
Abstract: Some embodiments include apparatus, systems, and methods that operate to apply a first value of a drain select gate voltage during a first portion of a programming time period associated with programming a plurality of memory cells, and to apply a second value of the drain select gate voltage different from the first value during a second, subsequent portion of the programming time period. The drain select gate voltage may be changed between groups of programming pulses in a single programming cycle. The first and second portions may be determined according to the number of applied programming pulses, the number of memory cells that have been completely programmed, and/or other conditions. Additional apparatus, systems, and methods are disclosed.
Abstract translation: 一些实施例包括在与编程多个存储器单元相关联的编程时间周期的第一部分期间操作以施加漏极选择栅极电压的第一值的装置，系统和方法，以及施加漏极选择的第二值 在第二编程时间段的后续部分中，栅极电压与第一值不同。 漏极选择栅极电压可以在单个编程周期中的编程脉冲组之间改变。 第一和第二部分可以根据应用的编程脉冲的数量，已经完全编程的存储器单元的数量和/或其他条件来确定。 公开了附加装置，系统和方法。
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公开(公告)号：US08730736B2
公开(公告)日：2014-05-20
申请号：US13892435
申请日：2013-05-13
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Taehoon Kim , Doyle Rivers , Roger Porter
IPC: G11C16/04
CPC classification number: G11C16/10 , G11C5/145 , G11C11/5628 , G11C16/0483 , G11C16/3454 , G11C2211/5621
Abstract: Methods and memories having switching points for changing Vstep increments according to a level of a multilevel cell being programmed include programming at a smaller Vstep increment in narrow threshold voltage situations and programming at a larger Vstep increment where faster programming is desired.
Abstract translation: 具有用于根据正在编程的多电平单元的电平改变Vstep增量的切换点的方法和存储器包括在窄阈值电压情况下以较小的Vstep增量进行编程，并且在需要更快编程的较大Vstep增量下进行编程。
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公开(公告)号：US20160328353A1
公开(公告)日：2016-11-10
申请号：US15212902
申请日：2016-07-18
Applicant: Micron Technology, Inc.
Inventor： Doyle Rivers , Paul D. Ruby , Anand S. Ramalingam , Rajesh Sundaram , Julie M. Walker
CPC classification number: G06F13/4247 , G06F13/14 , G06F13/385
Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.
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公开(公告)号：US20140313825A1
公开(公告)日：2014-10-23
申请号：US14320068
申请日：2014-06-30
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Pranav Kalavade , Doyle Rivers
CPC classification number: G11C16/12 , G11C16/04 , G11C16/0433
Abstract: Some embodiments include apparatus, systems, and methods that operate to apply a first value of a drain select gate voltage during a first portion of a programming time period associated with programming a plurality of memory cells, and to apply a second value of the drain select gate voltage different from the first value during a second, subsequent portion of the programming time period. The drain select gate voltage may be changed between groups of programming pulses in a single programming cycle. The first and second portions may be determined according to the number of applied programming pulses, the number of memory cells that have been completely programmed, and/or other conditions. Additional apparatus, systems, and methods are disclosed.
Abstract translation: 一些实施例包括在与编程多个存储器单元相关联的编程时间周期的第一部分期间操作以施加漏极选择栅极电压的第一值的装置，系统和方法，以及施加漏极选择的第二值 在第二编程时间段的后续部分中，栅极电压与第一值不同。 漏极选择栅极电压可以在单个编程周期中的编程脉冲组之间改变。 第一和第二部分可以根据应用的编程脉冲的数量，已经完全编程的存储器单元的数量和/或其他条件来确定。 公开了附加装置，系统和方法。
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公开(公告)号：US20130250679A1
公开(公告)日：2013-09-26
申请号：US13892435
申请日：2013-05-13
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Taehoon Kim , Doyle Rivers , Roger Porter
IPC: G11C16/10
CPC classification number: G11C16/10 , G11C5/145 , G11C11/5628 , G11C16/0483 , G11C16/3454 , G11C2211/5621
Abstract: Methods and memories having switching points for changing Vstep increments according to a level of a multilevel cell being programmed include programming at a smaller Vstep increment in narrow threshold voltage situations and programming at a larger Vstep increment where faster programming is desired.
Abstract translation: 具有用于根据正在编程的多电平单元的电平改变Vstep增量的切换点的方法和存储器包括在窄阈值电压情况下以较小的Vstep增量进行编程，并且在需要更快编程的较大Vstep增量下进行编程。
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