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公开(公告)号：US09608027B2
公开(公告)日：2017-03-28
申请号：US14624198
申请日：2015-02-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Tiejun Dai
CPC classification number: H01L27/14647 , G01S7/4816 , G01S7/4914 , G01S17/023 , G01S17/89 , H01L27/14634 , H01L27/14645 , H01L27/14652 , H04N9/045
Abstract: A pixel array includes a plurality of visible light pixels arranged in the pixel array. Each one of the plurality of visible light pixels includes a photosensitive element arranged in a first semiconductor die to detect visible light. Each one of the plurality of visible light pixels is coupled to provide color image data to visible light readout circuitry disposed in a second semiconductor die stacked with and coupled to the first semiconductor die in a stacked chip scheme. A plurality of infrared (IR) pixels arranged in the pixel array. Each one of the plurality of IR pixels includes a single photon avalanche photodiode (SPAD) arranged in the first semiconductor die to detect IR light. Each one of the plurality of visible light pixels is coupled to provide IR image data to IR light readout circuitry disposed in the second semiconductor die.
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公开(公告)号：US20160353084A1
公开(公告)日：2016-12-01
申请号：US14721424
申请日：2015-05-26
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Tiejun Dai
CPC classification number: H04N13/254 , G01S7/4816 , G01S7/4863 , G01S7/4865 , G01S7/497 , G01S17/89 , H01L27/14609 , H01L27/14627 , H01L27/14634 , H04N5/374 , H04N13/211 , H04N2013/0081
Abstract: A time of flight sensor includes control circuitry and a time of flight pixel array. The control circuitry is coupled to synchronously send a sync signal. The time of flight pixel array includes a plurality of time of flight pixel cells. Each one of the time of flight pixel cells includes a photosensor and a delay circuit. The photosensor is configured to generate an image signal in response to receiving photons from a light pulse reflected from an object. The delay circuit is coupled to generate a delayed sync signal in response to the sync signal. The delay circuit includes a delay transistor. The time of flight pixel array includes a transistor gradient where a transistor gate length of the delay transistor varies so that each of the time of flight pixel cells receive their respective delayed sync signal at a same time.
Abstract translation: 飞行时间传感器包括控制电路和飞行时间像素阵列。 控制电路被耦合以同步地发送同步信号。 飞行时间像素阵列包括多个飞行时间像素单元。 飞行时间像素单元中的每一个包括光电传感器和延迟电路。 光传感器被配置为响应于从对象反射的光脉冲接收光子而产生图像信号。 延迟电路被耦合以响应于同步信号产生延迟的同步信号。 延迟电路包括延迟晶体管。 飞行时间像素阵列包括晶体管梯度，其中延迟晶体管的晶体管栅极长度变化，使得每个飞行时间像素单元同时接收它们各自的延迟同步信号。
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公开(公告)号：US09819930B2
公开(公告)日：2017-11-14
申请号：US14721424
申请日：2015-05-26
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Tiejun Dai
CPC classification number: H04N13/254 , G01S7/4816 , G01S7/4863 , G01S7/4865 , G01S7/497 , G01S17/89 , H01L27/14609 , H01L27/14627 , H01L27/14634 , H04N5/374 , H04N13/211 , H04N2013/0081
Abstract: A time of flight sensor includes control circuitry and a time of flight pixel array. The control circuitry is coupled to synchronously send a sync signal. The time of flight pixel array includes a plurality of time of flight pixel cells. Each one of the time of flight pixel cells includes a photosensor and a delay circuit. The photosensor is configured to generate an image signal in response to receiving photons from a light pulse reflected from an object. The delay circuit is coupled to generate a delayed sync signal in response to the sync signal. The delay circuit includes a delay transistor. The time of flight pixel array includes a transistor gradient where a transistor gate length of the delay transistor varies so that each of the time of flight pixel cells receive their respective delayed sync signal at a same time.
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公开(公告)号：US09819890B2
公开(公告)日：2017-11-14
申请号：US14828404
申请日：2015-08-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Rui Wang , Le Huang , Tianjia Sun , Tiejun Dai
Abstract: Techniques and mechanisms to mitigate fixed pattern noise in image sensor data. In an embodiment, readout circuitry includes an adaptive analog-to-digital converter (ADC) comprising a differential amplifier and a feedback path coupled across the differential amplifier, where the ADC is to receive a ramp signal, a control signal associated with a transition rate of the ramp signal, and an analog signal generated by one or more pixels. In another embodiment, the feedback path and/or one or more other circuit elements coupled to the differential amplifier are configured, based on the control signal, to provide one of multiple loop gains with the differential amplifier. The ADC provides a digital output to determine a comparison based on the ramp signal and the analog signal.
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5.发明申请公开(公告)号：US20150288902A1
公开(公告)日：2015-10-08
申请号：US14247855
申请日：2014-04-08
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Liping Deng , Tiejun Dai
CPC classification number: H04N5/3698 , H04N5/357 , H04N5/378
Abstract: An image sensor read out circuit includes a first current mirror circuit in which a second current conducted through a second current path is controlled in response to a first current conducted through the first current path. The second current is conducted through an amplifier transistor of a pixel circuit. A first current source coupled to the first current path to provide a substantially constant current component of the first current. A second current source coupled to a power supply rail of the pixel circuit and coupled to the first current path to provide a ripple current component of the first current. The ripple current component provided by the second current source is responsive to a ripple in the power supply rail. The first current is responsive to a sum of the currents from the first and second current sources.
Abstract translation: 图像传感器读出电路包括第一电流镜电路，其中响应于通过第一电流路径传导的第一电流来控制通过第二电流路径传导的第二电流。 第二电流通过像素电路的放大器晶体管导通。 耦合到第一电流路径以提供第一电流的基本上恒定的电流分量的第一电流源。 耦合到所述像素电路的电源轨并耦合到所述第一电流路径以提供所述第一电流的纹波电流分量的第二电流源。 由第二电流源提供的纹波电流分量响应于电源轨道中的纹波。 第一电流响应于来自第一和第二电流源的电流的总和。
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Patent Agency Ranking
公开(公告)号：US20170208276A1
公开(公告)日：2017-07-20
申请号：US14996141
申请日：2016-01-14
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Qingfei Chen , Chun-Ming Tang , Jingyi Liu
IPC: H04N5/378 , G06T1/20 , H01L27/146 , H04N5/374
CPC classification number: H04N5/378 , H01L27/14641 , H01L27/14643 , H04N5/3577 , H04N5/363 , H04N5/3658 , H04N5/37455
Abstract: A method of implementing dynamic ground sharing in an image sensor with pipeline architecture starts with a pixel array capturing image data. Pixel array includes pixels to generate pixel data signals, respectively. A readout circuitry acquires the image data from a row in the pixel array. An analog-to-digital conversion (ADC) circuitry included in the readout circuitry samples the image data from the row to obtain sampled input data. When the ADC circuitry is sampling, a ground sharing switch is closed to couple the pixel array and the ADC circuitry to a common ground. When the ADC circuitry is not sampling, the ground sharing switch is open to separate the pixel array and the ADC circuitry from the common ground. The ADC circuitry converts the sampled image data from analog to digital to obtain an ADC output. Other embodiments are described.
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7.发明申请公开(公告)号：US20170054931A1
公开(公告)日：2017-02-23
申请号：US14828404
申请日：2015-08-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Rui Wang , Le Huang , Tianjia Sun , Tiejun Dai
Abstract: Techniques and mechanisms to mitigate fixed pattern noise in image sensor data. In an embodiment, readout circuitry includes an adaptive analog-to-digital converter (ADC) comprising a differential amplifier and a feedback path coupled across the differential amplifier, where the ADC is to receive a ramp signal, a control signal associated with a transition rate of the ramp signal, and an analog signal generated by one or more pixels. In another embodiment, the feedback path and/or one or more other circuit elements coupled to the differential amplifier are configured, based on the control signal, to provide one of multiple loop gains with the differential amplifier. The ADC provides a digital output to determine a comparison based on the ramp signal and the analog signal.
Abstract translation: 降低图像传感器数据中固定模式噪声的技术和机制。 在一个实施例中，读出电路包括自适应模数转换器（ADC），该自适应模数转换器（ADC）包括差分放大器和耦合在差分放大器两端的反馈路径，其中ADC将接收斜坡信号，与转换速率相关的控制信号 的斜坡信号，以及由一个或多个像素产生的模拟信号。 在另一个实施例中，耦合到差分放大器的反馈路径和/或一个或多个其他电路元件基于控制信号被配置为提供差分放大器的多个环路增益之一。 ADC提供数字输出，以确定基于斜坡信号和模拟信号的比较。
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公开(公告)号：US20160240579A1
公开(公告)日：2016-08-18
申请号：US14624198
申请日：2015-02-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Tiejun Dai
IPC: H01L27/146 , H04N5/374 , H04N5/378 , G01S17/89
CPC classification number: H01L27/14647 , G01S7/4816 , G01S7/4914 , G01S17/023 , G01S17/89 , H01L27/14634 , H01L27/14645 , H01L27/14652 , H04N9/045
Abstract: A pixel array includes a plurality of visible light pixels arranged in the pixel array. Each one of the plurality of visible light pixels includes a photosensitive element arranged in a first semiconductor die to detect visible light. Each one of the plurality of visible light pixels is coupled to provide color image data to visible light readout circuitry disposed in a second semiconductor die stacked with and coupled to the first semiconductor die in a stacked chip scheme. A plurality of infrared (IR) pixels arranged in the pixel array. Each one of the plurality of IR pixels includes a single photon avalanche photodiode (SPAD) arranged in the first semiconductor die to detect IR light. Each one of the plurality of visible light pixels is coupled to provide IR image data to IR light readout circuitry disposed in the second semiconductor die.
Abstract translation: 像素阵列包括排列在像素阵列中的多个可见光像素。 多个可见光像素中的每一个包括布置在第一半导体管芯中以检测可见光的感光元件。 多个可见光像素中的每一个被耦合以向布置在第二半导体管芯中的可见光读出电路提供彩色图像数据，所述可见光读出电路以叠层芯片方案堆叠并耦合到第一半导体管芯。 布置在像素阵列中的多个红外（IR）像素。 多个IR像素中的每一个包括布置在第一半导体管芯中以检测IR光的单个光子雪崩光电二极管（SPAD）。 多个可见光像素中的每一个被耦合以向设置在第二半导体管芯中的IR光读出电路提供IR图像数据。
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9.发明授权公开(公告)号：US09148596B1
公开(公告)日：2015-09-29
申请号：US14247855
申请日：2014-04-08
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Rui Wang , Liping Deng , Tiejun Dai
CPC classification number: H04N5/3698 , H04N5/357 , H04N5/378
Abstract: An image sensor read out circuit includes a first current mirror circuit in which a second current conducted through a second current path is controlled in response to a first current conducted through the first current path. The second current is conducted through an amplifier transistor of a pixel circuit. A first current source is coupled to the first current path to provide a substantially constant current component of the first current. A second current source is coupled to a power supply rail of the pixel circuit and coupled to the first current path to provide a ripple current component of the first current. The ripple current component provided by the second current source is responsive to a ripple in the power supply rail. The first current is responsive to a sum of the currents from the first and second current sources.
Abstract translation: 图像传感器读出电路包括第一电流镜电路，其中响应于通过第一电流路径传导的第一电流来控制通过第二电流路径传导的第二电流。 第二电流通过像素电路的放大器晶体管导通。 第一电流源耦合到第一电流路径以提供第一电流的基本上恒定的电流分量。 第二电流源耦合到像素电路的电源轨，并耦合到第一电流路径以提供第一电流的纹波电流分量。 由第二电流源提供的纹波电流分量响应于电源轨道中的纹波。 第一电流响应于来自第一和第二电流源的电流的总和。
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公开(公告)号：US20150228650A1
公开(公告)日：2015-08-13
申请号：US14175847
申请日：2014-02-07
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tianjia Sun , Lingchuan Li , Shumin Wu
IPC: H01L27/092 , H01L23/528
CPC classification number: H01L27/092 , G06F17/5077 , H01L23/528 , H01L23/5286 , H01L27/0207 , H01L27/11807 , H01L2027/11875 , H01L2924/0002 , H01L2924/00
Abstract: An integrated circuit chip includes CMOS integrated circuit cells arranged in a semiconductor layer, each including first and second active regions, having first and second polarities, respectively. A first power rail is routed along boundaries of the CMOS integrated circuit cells proximate to the first active regions. A second power rail is routed over second active regions. Global routing channels are routed over the second active regions such that the second power rail is disposed between the global routing channels and the first power rail. The global routing channels are coupled between the CMOS integrated circuit cells to couple the CMOS integrated circuit cells together globally in the integrated circuit chip.
Abstract translation: 集成电路芯片包括布置在半导体层中的分别具有第一和第二极性的第一和第二有源区的CMOS集成电路单元。 第一电源轨沿着靠近第一有源区的CMOS集成电路单元的边界布线。 第二个电力轨道路由在第二个有源区域上。 全局路由信道被路由在第二有源区域上，使得第二电力轨设置在全局路由信道和第一电力轨道之间。 全局路由信道耦合在CMOS集成电路单元之间，以将集成电路芯片中的CMOS集成电路单元集成在一起。
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