公开(公告)号：US09666664B2

公开(公告)日：2017-05-30

申请号：US14663140

申请日：2015-03-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Ryo Kajitani ,  Tetsuzo Ueda ,  Yoshiharu Anda ,  Naohiro Tsurumi ,  Satoshi Nakazawa

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L29/0611 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/404 ,  H01L29/51 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/78

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

公开(公告)号：US09583608B2

公开(公告)日：2017-02-28

申请号：US14418589

申请日：2013-05-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yasuhiro Yamada ,  Yoshiharu Anda ,  Asamira Suzuki

IPC: H01L29/778 ,  H01L29/66 ,  H01L21/285 ,  H01L29/205 ,  H01L29/417 ,  H01L29/49 ,  H01L29/267 ,  H01L29/10 ,  H01L29/20 ,  H01L29/423 ,  H01L21/02 ,  H01L23/00

CPC classification number: H01L29/7787 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02565 ,  H01L21/02579 ,  H01L21/28556 ,  H01L23/564 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/267 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/4966 ,  H01L29/66462 ,  H01L29/7786 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A nitride semiconductor device of the present invention has a source-electrode-side insulator protection film layer disposed between a source electrode and a drain electrode on a second nitride semiconductor layer and formed at least partially covering the source electrode, a drain-electrode-side insulator protection film layer disposed separately from the source-electrode-side insulator protection film layer and formed at least partially covering the drain electrode, and a gate layer formed in contact with the second nitride semiconductor layer between the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and made of a p-type metal oxide semiconductor, and the gate layer has regions opposite to the second nitride semiconductor layer across each of the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and a region in contact with the second nitride semiconductor layer.

Abstract translation: 本发明的氮化物半导体器件具有源电极侧绝缘体保护膜层，其设置在第二氮化物半导体层上的源电极和漏电极之间，并且至少部分地覆盖源电极，漏电极侧 绝缘体保护膜层，与源电极侧绝缘体保护膜层分离设置，并形成为至少部分地覆盖漏极电极;以及栅极层，其与源极侧绝缘体保护膜之间的第二氮化物半导体层接触形成 层和漏电极侧绝缘体保护膜层，由p型金属氧化物半导体构成，栅极层具有穿过源电极侧绝缘体保护膜层和第二氮化物半导体层的与第二氮化物半导体层相反的区域 漏电极侧绝缘体保护膜层和与第二氮化物半导体接触的区域 ctor层。